公开(公告)号：US20070179725A1

公开(公告)日：2007-08-02

申请号：US11728679

申请日：2007-03-26

Applicant: Marcus Austin ,  Daniel Mulligan ,  Matthew Henson

Inventor： Marcus Austin ,  Daniel Mulligan ,  Matthew Henson

IPC: G06F19/00

CPC classification number: G11B19/047 ,  G01K2219/00 ,  H02J1/08 ,  H02J7/0031 ,  H02J7/0063 ,  H02M2001/009

Abstract: A method for use in a multifunction handheld device includes receiving a plurality of digitally formatted files from a host device when coupled to the host device. A selected one of the plurality of digitally formatted files is played, the playing includes generating an audio output. The method monitors for a low voltage condition produced by a low battery voltage. When the low voltage condition is detected, a first fail safe algorithm is enabled to store an audio setting corresponding to the playing of the audio output, and to shutdown the multifunction handheld device, so that later, when the playback can be resumed, the playback can continue based on the stored audio setting.

Abstract translation: 一种用于多功能手持设备的方法包括当耦合到主机设备时从主机设备接收多个数字格式的文件。 播放多个数字格式的文件中的所选择的一个，播放包括产生音频输出。 该方法监测由低电池电压产生的低电压状况。 当检测到低电压状态时，第一故障安全算法被使能以存储与播放音频输出相对应的音频设置，并且关闭多功能手持设备，以便以后，当可以恢复播放时，播放 可以根据存储的音频设置继续。

公开(公告)号：US20070130386A1

公开(公告)日：2007-06-07

申请号：US11263227

申请日：2005-10-31

Applicant: Matthew Henson ,  David Baker

Inventor： Matthew Henson ,  David Baker

IPC: G06F13/28

CPC classification number: G06F13/28

Abstract: A system and method for providing direct memory access is disclosed. In a particular embodiment, a direct memory access module is disclosed that includes a memory, a first interface coupled to a processor, and a second interface coupled to a peripheral module. A first instruction received from the first interface is stored in the memory. The first instruction includes a number of programmed input/output words to be provided to the peripheral module via the second interface. The direct memory access module also includes an instruction execution unit to process the first instruction.

Abstract translation: 公开了一种用于提供直接存储器访问的系统和方法。 在特定实施例中，公开了一种直接存储器访问模块，其包括存储器，耦合到处理器的第一接口和耦合到外围模块的第二接口。 从第一接口接收的第一指令被存储在存储器中。 第一指令包括经由第二接口提供给外围模块的多个已编程的输入/输出字。 直接存储器访问模块还包括处理第一指令的指令执行单元。

公开(公告)号：US20070005825A1

公开(公告)日：2007-01-04

申请号：US11171919

申请日：2005-06-30

Applicant: Matthew Henson ,  David Baker

Inventor： Matthew Henson ,  David Baker

IPC: G06F13/28

CPC classification number: G06F13/1694

Abstract: The disclosure is directed to a device including a memory interface. The memory interface includes a data interface, a first state machine and a second state machine. The first state machine includes a first chip select interface and a first ready/busy interface. The first state machine is configured to select and monitor a first memory device via the first chip select interface and the first ready/busy interface, respectively, when the first memory device is coupled to the data interface. The second state machine includes a second chip select interface and a second ready/busy inter-face. The second state machine is configured to select and monitor a second memory device via the second chip select interface and the second ready/busy interface, respectively, when the second memory device is coupled to the data interface.

Abstract translation: 本公开涉及包括存储器接口的设备。 存储器接口包括数据接口，第一状态机和第二状态机。 第一状态机包括第一芯片选择接口和第一就绪/忙碌接口。 第一状态机被配置为当第一存储器设备耦合到数据接口时，分别经由第一芯片选择接口和第一就绪/忙接口来选择和监视第一存储器设备。 第二状态机包括第二芯片选择接口和第二就绪/忙碌接口。 第二状态机被配置为当第二存储器设备耦合到数据接口时，分别经由第二芯片选择接口和第二就绪/忙接口来选择和监视第二存储器设备。

公开(公告)号：US20060258398A1

公开(公告)日：2006-11-16

申请号：US11126554

申请日：2005-05-11

Applicant: Michael May ,  Marcus May ,  Dave Baker ,  Matthew Henson

Inventor： Michael May ,  Marcus May ,  Dave Baker ,  Matthew Henson

IPC: H04M1/00 ,  H04B1/38

CPC classification number: H04H40/45

Abstract: A handheld audio system includes a radio signal decoder integrated circuit (IC) and a digital audio processing integrated circuit. The radio signal decoder integrated circuit produces a digital left channel signal and a digital right channel signal from a received radio signal in accordance with an enable signal and also produces a system clock. The digital audio processing integrated circuit includes a DC-to-DC converter and a processing module. The DC-to-DC converter is operably coupled to produce at least one power supply voltage based on the system clock. The processing module is operably coupled to produce the enable signal when the at least one power supply voltage has reached a desired level and to produce audio signals for audio playback from at least one of the digital left and right channel signals and a stored digital audio file.

Abstract translation: 手持音频系统包括无线电信号解码器集成电路（IC）和数字音频处理集成电路。 无线电信号解码器集成电路根据使能信号从接收的无线电信号产生数字左声道信号和数字右声道信号，并且还产生系统时钟。 数字音频处理集成电路包括DC-DC转换器和处理模块。 DC-DC转换器可操作地耦合以基于系统时钟产生至少一个电源电压。 当至少一个电源电压已经达到期望的水平并且从数字左声道信号和右声道信号中的至少一个产生用于音频回放的音频信号时，处理模块可操作地耦合以产生使能信号，并且存储的数字音频文件 。

公开(公告)号：US20060248264A1

公开(公告)日：2006-11-02

申请号：US11118587

申请日：2005-04-29

Applicant: Russel Schultz ,  David Moore ,  Matthew Henson

Inventor： Russel Schultz ,  David Moore ,  Matthew Henson

IPC: G06F12/00

CPC classification number: G06F12/1045 ,  G06F12/0842 ,  G06F12/12 ,  G06F2212/2022

Abstract: The disclosure is directed to a computational system including a processor, cache memory accessible to the processor, and a memory management unit accessible to the processor. The processor is configured to access a virtual memory space to perform a first task and is configured to access the virtual memory space to perform a second task. The virtual memory space references first and second sets of task instructions associated with the first and second tasks, respectively. The virtual memory space references non-instruction data associated with the first task. The cache memory is configured to store the first set of task instructions and the non-instruction data. The memory management unit is configured to determine the physical memory location of the second set of task instructions. The computational system is configured to not write the first set of task instructions and the non-instruction data to a physical location beyond the cache memory.

公开(公告)号：US20060190199A1

公开(公告)日：2006-08-24

申请号：US11407821

申请日：2006-04-20

Applicant: Marcus May ,  Daniel Mulligan ,  Matthew Henson

Inventor： Marcus May ,  Daniel Mulligan ,  Matthew Henson

IPC: G01R31/36 ,  G06F19/00

CPC classification number: G11B19/047 ,  G01K2219/00 ,  H02J1/08 ,  H02J7/0031 ,  H02J7/0063 ,  H02M2001/009

Abstract: A method for efficient battery use begins by monitoring at least one output of the handheld device for an overload condition. The processing continues by monitoring a system voltage produced by a DC-to-DC converter for a system low voltage condition. The process continues by monitoring voltage of the battery for a battery low voltage condition. The processing then continues by enabling one of a plurality of fail-safe algorithms based on when one or more of the overload condition, the system low voltage condition, and/or the battery low voltage condition are detected.

Abstract translation: 一种用于高效电池使用的方法是通过监视手持设备的至少一个输出来进行过载状态。 通过监视由系统低电压状态的DC-DC转换器产生的系统电压，继续处理。 该过程通过监视电池的电池电压低电压状态来继续。 然后，根据检测到过载条件，系统低电压条件和/或电池低电压条件中的一个或多个，启用多个故障保护算法中的一个，继续处理。