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公开(公告)号:US11317088B2
公开(公告)日:2022-04-26
申请号:US16874057
申请日:2020-05-14
Applicant: QUALCOMM Incorporated
Inventor: Han Huang , Wei-Jung Chien , Marta Karczewicz
IPC: H04N11/02 , H04N19/109 , H04N19/503 , H04N19/176
Abstract: This disclosure describes gradient-based prediction refinement. A video coder (e.g., video encoder or video decoder) determines one or more prediction blocks for inter-predicting a current block (e.g., based on one or more motion vectors for the current block). In gradient-based prediction refinement, the video coder modifies one or more samples of the prediction block based on various factors such as displacement in a horizontal direction, the horizontal gradient, a displacement in the vertical direction, and a vertical gradient. This disclosure provides for gradient-based prediction refinement where a precision level of the displacement (e.g., at least one of the horizontal or vertical displacement) is unified (e.g., the same) for different prediction modes (e.g., including an affine mode and a bi-directional optical flow (BDOF) mode).
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22.
公开(公告)号:US20220070443A1
公开(公告)日:2022-03-03
申请号:US17454555
申请日:2021-11-11
Applicant: QUALCOMM Incorporated
Inventor: Chun-Chi Chen , Wei-Jung Chien , Han Huang , Yao-Jen Chang , Kevin Pascal Andre Reuze , Marta Karczewicz
IPC: H04N19/105 , H04N19/137 , H04N19/176 , H04N19/30 , H04N19/46 , B23K20/12 , B23P15/00 , G11B33/14
Abstract: A video coder is configured to form, in a symmetric motion vector difference mode, a List 0 (L0) base vector using a L0 Advanced Motion Vector Prediction (AMVP) candidate list and a List 1 (L1) base vector using a L1 AMVP candidate list; determine a refined L0 motion vector and a refined L1 motion vector by performing a decoder-side motion vector refinement process that refines the L0 base vector and the L1 base vector; and use the refined L0 motion vector and the refined L1 motion vector to determine a prediction block for a current block of a current picture of the video data.
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23.
公开(公告)号:US11190797B2
公开(公告)日:2021-11-30
申请号:US16803520
申请日:2020-02-27
Applicant: QUALCOMM Incorporated
Inventor: Hongtao Wang , Wei-Jung Chien , Marta Karczewicz , Han Huang
IPC: H04N19/577 , H04N19/176 , H04N19/52
Abstract: A video coder may be configured to determine to use a decoder side motion vector refinement process, including bi-lateral template matching, based on whether or not weights used for bi-predicted prediction are equal or not. In one example, decoder side motion vector refinement may be disabled when weights used for bi-predicted prediction are not equal.
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公开(公告)号:US20210250621A1
公开(公告)日:2021-08-12
申请号:US17167723
申请日:2021-02-04
Applicant: QUALCOMM Incorporated
Inventor: Han Huang , Wei-Jung Chien , Marta Karczewicz
IPC: H04N19/96 , H04N19/186 , G06N5/04
Abstract: A video coder may be configured to determine a partitioning for a picture of video data using dual tree partitioning. The video coder may receive a picture of video data, determine a partitioning for the picture of video data using dual tree partitioning for luma blocks and chroma blocks based on a minimum quadtree size, wherein a maximum value for the minimum quadtree size is equal to a threshold used for inferring a quadtree split, and code the partitioned picture.
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公开(公告)号:US11012697B2
公开(公告)日:2021-05-18
申请号:US16705016
申请日:2019-12-05
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin , Wei-Jung Chien , Han Huang , Marta Karczewicz
IPC: H04N19/105 , H04N19/14 , H04N19/176 , H04N19/423 , H04N19/119
Abstract: A video coder can be configured to code video data by determining a first block size threshold for a block of video data; determining a second block size threshold, wherein the second block size threshold is smaller than the first block size threshold; partitioning the block of video data into smaller sub-blocks; in response to determining that a first partition of the partitioned block is smaller or equal to the first block size threshold, determining that blocks within the partition belong to a parallel estimation area; and in response to determining that a second partition of the partitioned block is smaller or equal to the second block size threshold, determining that blocks within the second partition belong to an area for a shared candidate list.
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公开(公告)号:US20210092427A1
公开(公告)日:2021-03-25
申请号:US17028599
申请日:2020-09-22
Applicant: QUALCOMM Incorporated
Inventor: Chun-Chi Chen , Han Huang , Wei-Jung Chien , Marta Karczewicz
IPC: H04N19/50 , H04N19/172 , H04N19/176
Abstract: A video coder is configured to use bi-directional optical flow (BDOF) to determine, based on a first reference picture and a second reference picture, a prediction block for a current block of a current picture of the video data. The first reference picture is a first picture order count (POC) distance from the current picture. The second reference picture is a second POC distance from the current picture. The first POC distance must be equal to the second POC distance for BDOF to be used to determine the prediction block for the current block. The video coder codes, according to the video coding standard, the current block based on the prediction block for the current block.
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27.
公开(公告)号:US20210092404A1
公开(公告)日:2021-03-25
申请号:US17024124
申请日:2020-09-17
Applicant: QUALCOMM Incorporated
Inventor: Han Huang , Wei-Jung Chien , Marta Karczewicz
IPC: H04N19/159 , H04N19/176 , H04N19/577
Abstract: A video coder may be configured to determine to use decoder side motion vector refinement and/or bi-directional optical flow based on the status of reference pictures associated with a block. In one example, a video decoder may determine whether decoder side motion vector refinement is enabled for a first block of video data based on whether a first reference picture from a first reference picture list is a short-term reference picture and whether a second reference picture from a second reference picture list is a short-term reference picture, and may then decode the first block of video data based on the determination.
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28.
公开(公告)号:US20200304828A1
公开(公告)日:2020-09-24
申请号:US16821812
申请日:2020-03-17
Applicant: QUALCOMM Incorporated
Inventor: Han Huang , Wei-Jung Chien , Marta Karczewicz
IPC: H04N19/52 , H04N19/436
Abstract: An example method includes deriving, responsive to determining to inherit affine motion information for a current block of video data located in a current virtual pipeline data unit (VPDU) from a neighboring block of video data located in a different VPDU, the affine motion information for the current block from two motion vectors of the neighboring block of video data regardless of whether the neighboring block of video data is coded with a 4-parameter affine model or a 6-parameter affine model. The example method further includes determining, based on the derived affine motion information for the current block of video data, a predictor block of video data; and reconstructing the current block of video data based on the predictor block of video data.
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公开(公告)号:US20200280736A1
公开(公告)日:2020-09-03
申请号:US16803520
申请日:2020-02-27
Applicant: QUALCOMM Incorporated
Inventor: Hongtao Wang , Wei-Jung Chien , Marta Karczewicz , Han Huang
IPC: H04N19/577 , H04N19/52 , H04N19/176
Abstract: A video coder may be configured to determine to use a decoder side motion vector refinement process, including bi-lateral template matching, based on whether or not weights used for bi-predicted prediction are equal or not. In one example, decoder side motion vector refinement may be disabled when weights used for bi-predicted prediction are not equal.
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公开(公告)号:US20200213585A1
公开(公告)日:2020-07-02
申请号:US16723318
申请日:2019-12-20
Applicant: QUALCOMM Incorporated
Inventor: Han Huang , Wei-Jung Chien , Vadim Seregin , Marta Karczewicz
IPC: H04N19/105 , H04N19/149 , H04N19/176 , G06F17/16 , G06F1/03
Abstract: A device for processing video data includes a memory configured to store video data and one or more processors implemented in circuitry. The one or more processors are configured to select two or more subblocks of one or more blocks of video data and generate an affine motion model for a current block of video data using a subblock motion vector from each of the two or more subblocks as control-point motion vectors for the current block. The one or more processors are further configured to determine one or more prediction blocks based on the affine motion model and predict the current block with the one or more prediction blocks.
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