公开(公告)号：US09219085B2

公开(公告)日：2015-12-22

申请号：US14508766

申请日：2014-10-07

Applicant: Samsung Display Co., Ltd.

Inventor： Su-Hyoung Kang ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na

IPC: H01L27/14 ,  H01L27/12 ,  H01L29/417 ,  H01L29/45 ,  H01L29/786 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L27/1248 ,  H01L23/291 ,  H01L23/3171 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A thin film transistor array panel and a manufacturing method capable of forming an insulating layer made of different materials for a portion contacting an oxide semiconductor and a second portion without an additional process. Source and drain electrodes of the thin film transistor each include a lower layer and an upper layer. A first passivation layer contacts the lower layer of the source and drain electrodes but does not contact the upper layer of the source and drain electrodes, and a second passivation layer is disposed on the upper layer of the source and drain electrodes. The first passivation layer may be made of silicon oxide, and the second passivation may be made of silicon nitride.

Abstract translation: 一种薄膜晶体管阵列面板和能够形成由不同材料制成的绝缘层的制造方法，用于与氧化物半导体和第二部分接触的部分，而不需要额外的工艺。 薄膜晶体管的源极和漏极各自包括下层和上层。 第一钝化层接触源电极和漏电极的下层，但不接触源极和漏极的上层，并且第二钝化层设置在源极和漏极的上层。 第一钝化层可以由氧化硅制成，并且第二钝化可以由氮化硅制成。

公开(公告)号：US20150171114A1

公开(公告)日：2015-06-18

申请号：US14279204

申请日：2014-05-15

Applicant: Samsung Display Co., Ltd.

Inventor： Seung-Hwan CHO ,  Su-Hyoung Kang ,  Yoon Ho Khang ,  Young Ki Shin ,  Myoung Geun Cha

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor and a display device having the thin film transistor capable of reducing the voltage between the source and drain electrodes of the thin film transistor are disclosed. One inventive aspect includes a gate electrode, a semiconductor pattern, a source electrode and a drain electrode. The source and drain electrodes are formed on the semiconductor pattern and spaced apart from each other. At least one of the source electrode and the drain electrode does not overlap the gate electrode.

Abstract translation: 公开了一种薄膜晶体管和具有能够降低薄膜晶体管的源极和漏极之间的电压的薄膜晶体管的显示装置。 本发明的一个方面包括栅电极，半导体图案，源电极和漏电极。 源极和漏极形成在半导体图案上并彼此间隔开。 源电极和漏电极中的至少一个不与栅电极重叠。