公开(公告)号：US10680114B2

公开(公告)日：2020-06-09

申请号：US15071182

申请日：2016-03-15

Applicant: Samsung Display Co., Ltd.

Inventor： Su-Hyoung Kang ,  Hyun-Gue Kim ,  Jong-Jun Baek

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L27/12 ,  G02F1/1343

Abstract: A thin film transistor includes a substrate, a gate electrode disposed on the substrate, an active pattern disposed on the gate electrode, a source electrode electrically coupled to the active pattern and a drain electrode electrically coupled to the active pattern. The active pattern includes a first channel layer overlapping the source electrode and the drain electrode and a second channel layer overlapping the gate electrode. The second channel layer includes a plurality of high electron mobility regions. An electron mobility of each of the high electron mobility regions is greater than an electron mobility of the first channel layer.

公开(公告)号：US09882056B2

公开(公告)日：2018-01-30

申请号：US14939564

申请日：2015-11-12

Applicant: Samsung Display Co., Ltd.

Inventor： Yong-Su Lee ,  Yoon-Ho Khang ,  Se-Hwan Yu ,  Su-Hyoung Kang

IPC: H01L29/786 ,  H01L29/43 ,  H01L29/66 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L29/78642 ,  H01L29/41733 ,  H01L29/41741 ,  H01L29/41775 ,  H01L29/45 ,  H01L29/66666 ,  H01L29/6675 ,  H01L29/78606 ,  H01L29/7869

Abstract: A thin film transistor including a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode, a drain electrode and a graphene pattern. The semiconductor layer overlaps with the gate electrode. The gate insulating layer is disposed between the gate electrode and the semiconductor layer. The source electrode overlaps with the semiconductor layer. The drain electrode overlaps with the semiconductor layer. The drain electrode is spaced apart from the source electrode. The graphene pattern is disposed between the semiconductor layer and at least one of the source electrode and the drain electrode.

公开(公告)号：US08963154B2

公开(公告)日：2015-02-24

申请号：US13755730

申请日：2013-01-31

Applicant: Samsung Display Co., Ltd.

Inventor： Sang-Ho Park ,  Su-Hyoung Kang ,  Dong-Hwan Shim ,  Yoon-Ho Khang ,  Se-Hwan Yu ,  Min-Jung Lee ,  Yong-Su Lee

IPC: H01L29/04 ,  H01L29/10 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L27/127 ,  H01L21/28008 ,  H01L27/124 ,  H01L27/1262 ,  H01L29/66742 ,  H01L29/66757 ,  H01L29/786 ,  H01L29/78633 ,  H01L29/7869

Abstract: A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.

Abstract translation: 薄膜晶体管基板包括基底基板，设置在基底基板上的有源图案，设置在有源图案上的栅极绝缘图案，设置在栅极绝缘图案上并与沟道重叠的栅电极，以及布置的阻光图案 在基底基板和活性图案之间并且具有大于活性图案的尺寸。 有源图案包括源电极，漏电极和设置在源电极和漏极之间的沟道。

公开(公告)号：US09268170B2

公开(公告)日：2016-02-23

申请号：US14456675

申请日：2014-08-11

Applicant: Samsung Display Co., Ltd.

Inventor： Byung-Duk Yang ,  Eun-Guk Lee ,  Se-Hwan Yu ,  Kyoung-Tai Han ,  Su-Hyoung Kang ,  Kyung-Sook Jeon

IPC: H01L27/12 ,  G02F1/1335 ,  H01L29/786

CPC classification number: G02F1/133516 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/78633

Abstract: An array substrate includes; a substrate, a gate line and a data line disposed on the substrate, a thin film transistor (“TFT”) electrically connected to the gate line and the data line, a light blocking member disposed on the substrate and a first color filter and a second color filter disposed on the substrate. The light blocking member covers a portion of the first color filter and the second color filter covers a portion of the light blocking member.

Abstract translation: 阵列基板包括： 设置在基板上的基板，栅极线和数据线，与栅极线和数据线电连接的薄膜晶体管（“TFT”），设置在基板上的遮光部件和第一滤色器以及 第二滤色器设置在基板上。 遮光构件覆盖第一滤色器的一部分，并且第二滤色器覆盖遮光构件的一部分。

公开(公告)号：US09252284B2

公开(公告)日：2016-02-02

申请号：US14182989

申请日：2014-02-18

Applicant: Samsung Display Co., Ltd.

Inventor： Jong-Chan Lee ,  Yoon-Ho Khang ,  Su-Hyoung Kang ,  Dong-Jo Kim ,  Ji-Seon Lee ,  Myoung-Geun Cha ,  Deuk-Myung Ji

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78693

Abstract: A display substrate and a method for manufacturing a display substrate are disclosed. In the method, a gate electrode is formed on a base substrate. An active pattern is formed using an oxide semiconductor. The active pattern partially overlaps the gate electrode. A first insulation layer pattern and a second insulation layer pattern are sequentially formed on the active pattern. The first insulation layer pattern and the second insulation layer pattern overlap the gate electrode. A third insulation layer is formed to cover the active pattern, the first insulation layer pattern and the second insulation layer pattern. Either the first insulation layer pattern or the second insulation layer pattern includes aluminum oxide. Forming the first insulation layer pattern and the second insulation layer pattern includes performing a backside exposure process using the gate electrode as an exposure mask.

Abstract translation: 公开了显示基板和显示基板的制造方法。 在该方法中，在基底基板上形成栅电极。 使用氧化物半导体形成有源图案。 有源图案部分地与栅电极重叠。 在活性图案上依次形成第一绝缘层图案和第二绝缘层图案。 第一绝缘层图案和第二绝缘层图案与栅电极重叠。 形成第三绝缘层以覆盖有源图案，第一绝缘层图案和第二绝缘层图案。 第一绝缘层图案或第二绝缘层图案都包括氧化铝。 形成第一绝缘层图案和第二绝缘层图案包括使用栅电极进行背面曝光处理作为曝光掩模。

公开(公告)号：US20150102336A1

公开(公告)日：2015-04-16

申请号：US14195806

申请日：2014-03-03

Applicant: Samsung Display Co., Ltd.

Inventor： Su-Hyoung Kang ,  Seung-Hwan Cho ,  Yoon-Ho Khang ,  Jong-Chan Lee

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L27/3248 ,  H01L29/66969 ,  H01L29/78645 ,  H01L29/7869

Abstract: A thin film transistor includes a semiconductor pattern formed on a substrate, the semiconductor pattern being formed of an oxide semiconductor and including a source area, a drain area, and an intermediate area that is formed between the source area and the drain area and includes a plurality of first areas and a second area having higher conductivity than the first areas; a first insulating pattern formed to cover at least the first areas; a second insulating film formed to face the second area, the source area and the drain area; a gate electrode formed on the semiconductor pattern and insulated from the semiconductor pattern by the first insulating pattern and the second insulating film; and source and drain electrodes insulated from the gate electrode and being in contact with the source area and the drain area.

Abstract translation: 薄膜晶体管包括形成在基板上的半导体图案，所述半导体图案由氧化物半导体形成并且包括源极区域，漏极区域和形成在源极区域和漏极区域之间的中间区域，并且包括 多个第一区域和具有比第一区域更高的导电性的第二区域; 形成为至少覆盖所述第一区域的第一绝缘图案; 形成为面对所述第二区域，所述源极区域和所述漏极区域的第二绝缘膜; 形成在所述半导体图案上并通过所述第一绝缘图案和所述第二绝缘膜与所述半导体图案绝缘的栅电极; 以及与栅电极绝缘并与源极区域和漏极区域接触的源极和漏极电极。

公开(公告)号：US20150060843A1

公开(公告)日：2015-03-05

申请号：US14182989

申请日：2014-02-18

Applicant: Samsung Display Co., Ltd.

Inventor： Jong-Chan LEE ,  Yoon-Ho Khang ,  Su-Hyoung Kang ,  Dong-Jo Kim ,  Ji-Seon Lee ,  Myoung-Geun Cha ,  Deuk-Myung Ji

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78693

Abstract: A display substrate and a method for manufacturing a display substrate are disclosed. In the method, a gate electrode is formed on a base substrate. An active pattern is formed using an oxide semiconductor. The active pattern partially overlaps the gate electrode. A first insulation layer pattern and a second insulation layer pattern are sequentially formed on the active pattern. The first insulation layer pattern and the second insulation layer pattern overlap the gate electrode. A third insulation layer is formed to cover the active pattern, the first insulation layer pattern and the second insulation layer pattern. Either the first insulation layer pattern or the second insulation layer pattern includes aluminum oxide. Forming the first insulation layer pattern and the second insulation layer pattern includes performing a backside exposure process using the gate electrode as an exposure mask.

Abstract translation: 公开了显示基板和显示基板的制造方法。 在该方法中，在基底基板上形成栅电极。 使用氧化物半导体形成有源图案。 有源图案部分地与栅电极重叠。 在活性图案上依次形成第一绝缘层图案和第二绝缘层图案。 第一绝缘层图案和第二绝缘层图案与栅电极重叠。 形成第三绝缘层以覆盖有源图案，第一绝缘层图案和第二绝缘层图案。 第一绝缘层图案或第二绝缘层图案都包括氧化铝。 形成第一绝缘层图案和第二绝缘层图案包括使用栅电极进行背面曝光处理作为曝光掩模。

公开(公告)号：US20140151683A1

公开(公告)日：2014-06-05

申请号：US13873426

申请日：2013-04-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Su-Hyoung Kang ,  Yoon Ho Khang ,  Dong Jo Kim ,  Joon Yong Park ,  Sang Won Shin ,  Dong Hwan Shim

IPC: H01L29/786

CPC classification number: H01L29/7869

Abstract: A thin film transistor includes an oxide semiconductor, in which an oxygen defect content of the oxide semiconductor is no greater than about 0.15 based on an entire oxygen content included in the oxide semiconductor.

Abstract translation: 薄膜晶体管包括氧化物半导体，其中氧化物半导体的氧缺陷含量基于氧化物半导体中包含的全部氧含量不大于约0.15。

公开(公告)号：US11937493B2

公开(公告)日：2024-03-19

申请号：US17159854

申请日：2021-01-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joohyeon Lee ,  Jeoungsub Lee ,  Heonjung Shin ,  Taehyeog Jung ,  Hyun Joon Oh ,  Minhyuck Kang ,  Su-Hyoung Kang ,  Jeongeun Kim

IPC: H10K77/10 ,  B32B7/022 ,  B32B7/12 ,  B32B23/08 ,  B32B23/20 ,  B32B27/08 ,  B32B27/28 ,  B32B27/30 ,  B32B27/34 ,  B32B27/36 ,  B32B27/40 ,  B60K35/00 ,  G06F1/16 ,  G09F9/30 ,  H04M1/02 ,  H10K50/842 ,  H10K50/844 ,  H10K59/12 ,  H10K59/124 ,  H10K59/126 ,  H10K59/40 ,  H10K102/00

CPC classification number: H10K77/111 ,  B32B7/022 ,  B32B7/12 ,  B32B23/08 ,  B32B23/20 ,  B32B27/08 ,  B32B27/281 ,  B32B27/283 ,  B32B27/285 ,  B32B27/308 ,  B32B27/34 ,  B32B27/36 ,  B32B27/365 ,  B32B27/40 ,  H04M1/0268 ,  H10K59/12 ,  H10K59/40 ,  B32B2307/51 ,  B32B2457/20 ,  H10K2102/311

Abstract: Disclosed is a display device including a display module that has at least one folding area, a first film disposed on the display module and having a first modulus, a second film disposed on the first film, being farther from the display module than the first film, and having a second modulus less than the first modulus, and a third film disposed on the second film, being farther from the display module than the second film, and having a third modulus less than the second modulus. The third modulus is equal to or less than about one-sixth of the first modulus.

公开(公告)号：US09595687B2

公开(公告)日：2017-03-14

申请号：US14741966

申请日：2015-06-17

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Su-Hyoung Kang ,  Hyun Eok Shin ,  Chang Oh Jeong

IPC: H01L51/52 ,  H01L27/32 ,  H01L51/56

CPC classification number: H01L51/5215 ,  H01L27/3244 ,  H01L27/3248 ,  H01L51/5218 ,  H01L51/5221 ,  H01L51/56 ,  H01L2227/323 ,  H01L2251/301 ,  H01L2251/308

Abstract: An organic light emitting display device includes a thin film transistor including a semiconductor layer, a gate electrode, and source and drain electrodes, a pixel electrode connected to the thin film transistor, the pixel electrode including a first layer, a second layer disposed on the first layer and including silver, and a third layer including a carbon-based material and covering an upper portion and lateral surface of the second layer, an organic emission layer including an organic light emitting member and disposed on the pixel electrode, and a common electrode disposed on the organic emission layer.

Abstract translation: 一种有机发光显示装置，包括：薄膜晶体管，包括半导体层，栅极电极，源极和漏极，连接到薄膜晶体管的像素电极，所述像素电极包括第一层，第二层， 第一层并且包括银，以及包括碳基材料并覆盖第二层的上部和侧表面的第三层，包括有机发光部件并设置在像素电极上的有机发射层和公共电极 设置在有机发光层上。