Image sensor including conductive connection pattern

    公开(公告)号:US11502117B2

    公开(公告)日:2022-11-15

    申请号:US16900072

    申请日:2020-06-12

    Abstract: An image sensor includes a substrate having a first surface and a second surface facing each other, a plurality of photoelectric conversion regions disposed in the substrate, an isolation pattern disposed in the substrate between the photoelectric conversion regions, a conductive connection pattern disposed on the isolation pattern and in a trench penetrating the first surface of the substrate, and a first impurity region disposed in the substrate and adjacent to the first surface of the substrate. A first sidewall of the conductive connection pattern is in contact with the first impurity region. A dopant included in the conductive connection pattern includes the same element as an impurity doped in the first impurity region.

    Semiconductor devices and methods of manufacturing semiconductor devices

    公开(公告)号:US11335637B2

    公开(公告)日:2022-05-17

    申请号:US16508555

    申请日:2019-07-11

    Abstract: A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the active region at a side of the gate structure, a first interlayer insulating layer and a second interlayer insulating layer sequentially disposed on the gate structure and the source/drain region with an etch stop layer interposed therebetween, a first contact plug connected to the source/drain region through the first interlayer insulating layer, a second contact plug connected to the gate structure through the first interlayer insulating layer and the second interlayer insulating layer, a first metal line disposed on the second interlayer insulating layer, and having a metal via disposed in the second interlayer insulating layer and connected to the first contact plug, and a second metal line disposed on the second interlayer insulating layer, and directly connected to the second contact plug.

    IMAGE SENSOR
    24.
    发明申请

    公开(公告)号:US20210104577A1

    公开(公告)日:2021-04-08

    申请号:US17122070

    申请日:2020-12-15

    Abstract: An image sensor includes an insulating pattern disposed on a semiconductor substrate and having an opening, a color filter disposed within the opening of the insulating pattern, a capping insulating layer disposed on the color filter, a first electrode disposed on the capping insulating layer and having a portion overlapping with the color filter, a separation structure surrounding a side surface of the first electrode, and a photoelectric layer disposed on the first electrode. The separation structure includes a first insulating layer and a second insulating layer formed of different material.

    METHOD OF FABRICATING IMAGE SENSOR
    25.
    发明申请

    公开(公告)号:US20200219928A1

    公开(公告)日:2020-07-09

    申请号:US16658855

    申请日:2019-10-21

    Abstract: A method of fabricating an image sensor is provided. The method includes comprises forming a deep trench in a semiconductor substrate, performing a first plasma doping process to form a first impurity region a portion of in the semiconductor substrate adjacent to inner sidewalls and a bottom surface of the deep trench, the first impurity region being doped with first impurities of a first conductivity type, and performing an annealing process to diffuse the first impurities from the first impurity region into the semiconductor substrate to form a photoelectric conversion part.

    Semiconductor devices and methods of manufacturing semiconductor devices

    公开(公告)号:US10396034B2

    公开(公告)日:2019-08-27

    申请号:US15493965

    申请日:2017-04-21

    Abstract: A semiconductor device includes a substrate having an active region, a gate structure disposed on the active region, a source/drain region disposed in the active region at a side of the gate structure, a first interlayer insulating layer and a second interlayer insulating layer sequentially disposed on the gate structure and the source/drain region, a first contact plug connected to the source/drain region through the first interlayer insulating layer, a second contact plug connected to the gate structure through the first interlayer insulating layer and the second interlayer insulating layer, a first metal line disposed on the second interlayer insulating layer, and having a metal via disposed in the second interlayer insulating layer and connected to the first contact plug, and a second metal line disposed on the second interlayer insulating layer, and directly connected to the second contact plug. An interval between the first contact plug and the second contact plug may be about 10 nm or less.

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