公开(公告)号：US11282792B2

公开(公告)日：2022-03-22

申请号：US16805890

申请日：2020-03-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young Kun Jee ,  Hae-Jung Yu ,  Sangwon Kim ,  Un-Byoung Kang ,  Jongho Lee ,  Dae-Woo Kim ,  Wonjae Lee

IPC: H01L23/538 ,  H01L25/18 ,  H01L23/498

Abstract: A semiconductor package includes a package substrate, a plurality of package terminals disposed on the bottom surface of the package substrate, and an interposer substrate disposed on the top surface of the package substrate, a plurality of interposer terminals disposed on the bottom surface of the interposer substrate and electrically connected to the package substrate, a first semiconductor chip disposed on the top surface of the interposer substrate, a second semiconductor chip disposed on the top surface of the interposer substrate and disposed to be horizontally separated from the first semiconductor chip, a first plurality of signal pads disposed on the top surface of the interposer substrate and electrically connected to wiring in the interposer substrate and one or more circuits in the first semiconductor chip, a second plurality of signal pads disposed on the top surface of the interposer substrate and electrically connected to wiring in the interposer substrate and to one or more circuits in the second semiconductor chip, and a plurality of dummy pads disposed outside of an area occupied by the first semiconductor chip or the second semiconductor chip from a top-down view and disposed on the top surface of the interposer substrate. Each pad of the first plurality of signal pads and the second plurality of signal pads is configured to transfer signals between the interposer substrate and a respective semiconductor chip, and each pad of the dummy pads is not configured to transfer signals between the interposer substrate and any semiconductor chip disposed thereon.

公开(公告)号：US11062427B2

公开(公告)日：2021-07-13

申请号：US16720433

申请日：2019-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Insang Cho ,  Kiwon Yoo ,  Wonjae Lee ,  Daesung Cho ,  Chanyoung Hwang

IPC: G06T3/40 ,  G06F3/14 ,  G06N3/04 ,  G06N3/08

Abstract: Disclosed is an electronic apparatus. The electronic apparatus includes: a memory configured to store information regarding an artificial intelligence model including a plurality of layers; and a processor configured to perform interpolation processing on an input image and to process the interpolated image using the artificial intelligence model to obtain an output image, wherein the processor is configured to be operated in a first mode or a second mode based on an update of parameters used in at least one of the plurality of layers being required, the first mode including a mode in which the output image is obtained based on an image processed using the artificial intelligence model in which the parameters are updated and based on the interpolated image, and the second mode includes a mode in which the output image is obtained based on the interpolated image.

公开(公告)号：US20200082244A1

公开(公告)日：2020-03-12

申请号：US16433484

申请日：2019-06-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Insang Cho ,  Wonjae Lee ,  Chanyoung Hwang

IPC: G06N3/04 ,  G06K9/62 ,  G06N3/08

Abstract: Provided are an apparatus and a method using a convolutional neural network (CNN) including a plurality of convolution layers in the field of artificial intelligence (AI) systems and applications thereof. A computing apparatus using a CNN including a plurality of convolution layers includes a memory storing one or more instructions; and one or more processors configured to execute the one or more instructions stored in the memory to obtain input data; identify a filter for performing a convolution operation with respect to the input data, on one of the plurality of convolution layers; identify a plurality of sub-filters corresponding to different filtering regions within the filter; provide a plurality of feature maps based on the plurality of sub-filters; and obtain output data, based on the plurality of feature maps.