Water purifier and method for controlling water purifier

    公开(公告)号:US12221359B2

    公开(公告)日:2025-02-11

    申请号:US17833029

    申请日:2022-06-06

    Abstract: A water purifier including a raw water flow path, a first valve provided in a water purification path, a second valve provided in a wash water flow path, a purified water valve provided in a purified water supply tube, a flow sensor provided in a cooking water supply tube and sensing a flow amount of liquid flowing in the cooking water supply tube, a drainage valve provided in a drainage flow path branched from the cooking water supply tube and a controller for draining the liquid remaining in the cooking water supply tube, when a flow amount value sensed by the flow sensor for a preset period of time is less than or equal to a certain value, by controlling opening/closing of the purified water valve, the first valve, the second valve, and the drainage valve.

    Water purifier
    3.
    发明授权

    公开(公告)号:US11939232B2

    公开(公告)日:2024-03-26

    申请号:US17159529

    申请日:2021-01-27

    CPC classification number: C02F1/003 B01D35/30 C02F2307/10

    Abstract: Provided is a water purifier capable of freely changing a water outlet position, the water purifier including a water purifier body, a water outlet unit connected to the water purifier body, and including a manipulator configured to control the water purifier body and a water outlet nozzle configured to supply clean water to an outside of the water purifier body in connection with the manipulator, and a rotating device provided between the water purifier body and the water outlet unit and configured to rotate the water outlet unit, wherein the rotating device includes a fixed bracket and a rotating bracket provided to rotate relative to the fixed bracket to rotate the water outlet unit.

    Semiconductor packages
    7.
    发明授权

    公开(公告)号:US11621250B2

    公开(公告)日:2023-04-04

    申请号:US17571796

    申请日:2022-01-10

    Abstract: A semiconductor package may include first and second substrates, which are vertically stacked, a semiconductor device layer on a bottom surface of the second substrate to face a top surface of the first substrate, upper chip pads and an upper dummy pad on the top surface of the first substrate, penetration electrodes, which each penetrate the first substrate and are connected to separate, respective upper chip pads, lower chip pads on a bottom surface of the semiconductor device layer and electrically connected to separate, respective upper chip pads, and a lower dummy pad on the bottom surface of the semiconductor device layer and electrically isolated from the upper dummy pad. A distance between the upper and lower dummy pads in a horizontal direction that is parallel to the first substrate may be smaller than a diameter of the lower dummy pad.

    Semiconductor package and method of manufacture

    公开(公告)号:US11610828B2

    公开(公告)日:2023-03-21

    申请号:US17177725

    申请日:2021-02-17

    Abstract: A method of manufacture for a semiconductor package includes; forming a molding member on side surfaces of the semiconductor chips, using an adhesive to attach a carrier substrate to upper surfaces of the molding member and the semiconductor chips, using a first blade having a first blade-width to cut away selected portions of the carrier substrate and portions of the adhesive underlying the selected portions of the carrier substrate, and using the first blade to partially cut into an upper surface of the molding member to form a first cutting groove, wherein the selected portions of the carrier substrate are dispose above portions of the molding member between adjacent ones of semiconductor chips, using a second blade having a second blade-width narrower than the first blade-width to cut through a lower surface of the molding member to form a second cutting groove, wherein a combination of the first cutting groove and the second cutting groove separate a package structure including a semiconductor chip supported by a cut portion of the carrier substrate and bonding the package structure to an upper surface of a package substrate.

    Semiconductor package
    9.
    发明授权

    公开(公告)号:US11114364B2

    公开(公告)日:2021-09-07

    申请号:US16223642

    申请日:2018-12-18

    Abstract: Disclosed is a semiconductor package comprising first and second semiconductor structures spaced apart on a first substrate, a heat sink covering the first and second semiconductor structure and the first substrate, and a thermal interface material layer between the heat sink and the first and second semiconductor structures. The first semiconductor structure includes a first sidewall adjacent to the second semiconductor structure and a second sidewall opposite the first sidewall. The thermal interface material layer includes a first segment between the first and second semiconductor structures and a second segment protruding beyond the second sidewall. A first distance from a top surface of the first substrate to a lowest point of a bottom surface of the first segment is less than a second distance from the top surface of the first substrate to a lowest point of a bottom surface of the second segment.

    SEMICONDUCTOR DEVICE
    10.
    发明申请

    公开(公告)号:US20210193659A1

    公开(公告)日:2021-06-24

    申请号:US17195019

    申请日:2021-03-08

    Abstract: A semiconductor device includes an insulating layer on a substrate, a channel region on the insulating layer, a gate structure on the insulating layer, the gate structure crossing the channel region, source/drain regions on the insulating layer, the source/drain regions being spaced apart from each other with the gate structure interposed therebetween, the channel region connecting the source/drain regions to each other, and contact plugs connected to the source/drain regions, respectively. The channel region includes a plurality of semiconductor patterns that are vertically spaced apart from each other on the insulating layer, the insulating layer includes first recess regions that are adjacent to the source/drain regions, respectively, and the contact plugs include lower portions provided into the first recess regions, respectively.

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