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公开(公告)号：US20140094130A1
公开(公告)日：2014-04-03
申请号：US13630457
申请日：2012-09-28
Applicant: SILICON LABORATORIES, INC.
Inventor： Javier Elenes , Emmanuel Gautier , David Le Goff , Dana Taipale
IPC: H04B7/08
CPC classification number: H04B7/0845
Abstract: Systems and methods are disclosed for time-domain diversity combining of radio frequency (RF) broadcast signals. Two channelized quadrature (I/Q) signals are generated by different tuner circuitry coupled to two different antennas, are converted to frequency-domain signals, and are used to generate frequency-domain diversity weighting signals. The frequency-domain diversity weighting signals are then converted to time-domain weights and applied to the channelized I/Q signals. The weighted and channelized I/Q signals are then combined in the time-domain to provide a time-domain diversity combined signal. The resulting combined signal can be further processed, as desired, such as by using a demodulator to generate demodulated output signals. Disclosed methods and systems can be applied to a variety of receiver systems configured to receive RF broadcast signals.
Abstract translation: 公开了射频（RF）广播信号的时域分集组合的系统和方法。 双通道正交（I / Q）信号由耦合到两个不同天线的不同调谐器电路产生，被转换为频域信号，并用于产生频域分集加权信号。 然后将频域分集加权信号转换为时域权重并应用于信道化的I / Q信号。 然后将加权和信道化的I / Q信号在时域中组合以提供时域分集组合信号。 可以根据需要进一步处理所得到的组合信号，例如通过使用解调器来产生解调的输出信号。 公开的方法和系统可以应用于配置成接收RF广播信号的各种接收机系统。
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公开(公告)号：US11790044B2
公开(公告)日：2023-10-17
申请号：US17847408
申请日：2022-06-23
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes , Antonio Torrini
IPC: G06F18/21 , G06N3/088 , G06F18/25 , G06F18/20 , G06F18/214
CPC classification number: G06F18/2193 , G06F18/2148 , G06F18/251 , G06F18/285 , G06N3/088
Abstract: In an embodiment, an apparatus includes: a sensor to sense real world information; a digitizer coupled to the sensor to digitize the real world information into digitized information; a signal processor coupled to the digitizer to process the digitized information into an image; a discriminator coupled to the signal processor to determine, based at least in part on the image, whether the real world information comprises an anomaly, where the discriminator is trained via a generative adversarial network; and a controller coupled to the discriminator.
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公开(公告)号：US20220335260A1
公开(公告)日：2022-10-20
申请号：US17847408
申请日：2022-06-23
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes , Antonio Torrini
Abstract: In an embodiment, an apparatus includes: a sensor to sense real world information; a digitizer coupled to the sensor to digitize the real world information into digitized information; a signal processor coupled to the digitizer to process the digitized information into an image; a discriminator coupled to the signal processor to determine, based at least in part on the image, whether the real world information comprises an anomaly, where the discriminator is trained via a generative adversarial network; and a controller coupled to the discriminator.
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公开(公告)号：US20210390388A1
公开(公告)日：2021-12-16
申请号：US16901637
申请日：2020-06-15
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes , Praveen Vangala
Abstract: A system and method of implementing a convolutional neural network in the spectral domain is disclosed. Rather than performing convolution operations in the spatial domain, the inputs to the convolutional layer and the filter kernels are zero-padded and converted into the spectral domain. Once in the spectral domain, element wise multiplications are performed. The inverse Fourier Transform of the final output is then taken to return to the spatial domain. In certain embodiments, all filter kernels are learned in the spatial domain and are converted to the spectral domain at inference time in the convolutional neural network. In some embodiments a dimensionality reduction operation is applied in the spectral domain. In some embodiments, the conjugate symmetric filter kernels are learned directly in the spectral domain. In other embodiments, the learned spectral kernels apply various forms of dimensionality reduction such as puncturing, low-pass, high-pass, band-pass filtering operations.
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公开(公告)号：US11087030B2
公开(公告)日：2021-08-10
申请号：US16687959
申请日：2019-11-19
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes
Abstract: Embodiments include cryptographic circuits having isolated operation with respect to embedded sensor operations to mitigate side-channel attacks. A cryptographic circuit, a sensor, and an analog-to-digital converter (ADC) circuit are integrated into an integrated circuit along with a cryptographic circuit. A sensed signal is output with the sensor, and the sensed signal is converted to digital data using the ADC circuit. Further, cryptographic data is generated using one or more secret keys and the cryptographic circuit. The generation of the cryptographic data has isolated operation with respect to the operation of the sensor and the ADC circuit. The isolated operation mitigates side-channel attacks. The isolated operation can be achieved using power supply, clock, and/or reset circuits for the cryptographic circuit that are electrically isolated from similar circuits for the sensor and ADC circuit. The isolated operation can also be achieved using time-division multiplex operations. Other variations can also be implemented.
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Patent Agency Ranking
公开(公告)号：US20210150069A1
公开(公告)日：2021-05-20
申请号：US16688009
申请日：2019-11-19
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes
Abstract: Systems and methods are disclosed for side-channel attack mitigation for secure devices including cryptographic circuits using block ciphers that are not based upon feedback. For disclosed embodiments, an integrated circuit includes a cryptographic circuit and a controller. The cryptographic circuit performs cryptographic operations in a block cipher AES mode without feedback. The controller outputs control signals to the cryptographic circuit that cause the cryptographic circuit to perform the cryptographic operations on sequential data blocks with an internally permuted order to mitigate block cipher side-channel attacks. The internally permuted order can be generated using one or more random number generators, one or more pre-configured permutated orders, or other techniques. Further, sequential data blocks can be grouped into sequential subsets of data blocks, and the cryptographic operations can be performed in sequence for the subsets with data blocks within each subset being processed with an internally permuted order.
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27.发明授权公开(公告)号：US10256199B2
公开(公告)日：2019-04-09
申请号：US15644451
申请日：2017-07-07
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes , Michael Johnson , John Khoury
Abstract: An integrated circuit includes an energy detection circuit, a switching circuit, and a tamper response circuit. The integrated circuit has an input for receiving a radio frequency (RF) signal, a first output for providing a demodulated signal, and a second output for selectively providing a detect signal. The detect signal is provided in response to detecting that an energy of an internal signal exceeds a first threshold when the integrated circuit is in a secure mode. The switching circuit is used to alternatively switch the input of the energy detection circuit to an RF input terminal in a normal mode and to an internal antenna in a secure mode. The tamper response circuit disables a function of the integrated circuit in response to an activation of the detect signal in the secure mode.
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28.发明申请公开(公告)号：US20190097785A1
公开(公告)日：2019-03-28
申请号：US15717932
申请日：2017-09-27
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes
Abstract: A method of providing access to a resource in an integrated circuit (IC) includes determining whether an attempt is made to access the resource. The method also includes obtaining a random number, and setting a frequency of a clock signal to a new value based on a value of the random number. The method further includes authenticating cryptographically a command for accessing the resource using the new value of the frequency of the clock signal.
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29.发明申请公开(公告)号：US20190013281A1
公开(公告)日：2019-01-10
申请号：US15644451
申请日：2017-07-07
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes , Michael Johnson , John Khoury
Abstract: An integrated circuit includes an energy detection circuit, a switching circuit, and a tamper response circuit. The integrated circuit has an input for receiving a radio frequency (RF) signal, a first output for providing a demodulated signal, and a second output for selectively providing a detect signal. The detect signal is provided in response to detecting that an energy of an internal signal exceeds a first threshold when the integrated circuit is in a secure mode. The switching circuit is used to alternatively switch the input of the energy detection circuit to an RF input terminal in a normal mode and to an internal antenna in a secure mode. The tamper response circuit disables a function of the integrated circuit in response to an activation of the detect signal in the secure mode.
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公开(公告)号：US20180349600A1
公开(公告)日：2018-12-06
申请号：US15612841
申请日：2017-06-02
Applicant: Silicon Laboratories Inc.
Inventor： Javier Elenes , Sebastian Ahmed , Lars Lydersen
CPC classification number: G06F21/554 , G06F21/556 , G06F21/725
Abstract: An integrated circuit includes a tamper sensor that has plurality of state circuits. Each of the plurality of state circuits has a respective output that provides a respective logic state. When operating properly, the respective logic state is toggled in response to a clock signal. The respective logic state fails to toggle in response to a respective fault injection. The tamper sensor has an output that provides a fault signal in response to a difference in the respective logic state of the plurality of state circuits. Additionally, the integrated circuit includes a protected circuit, as well as a tamper response circuit. The tamper response circuit is connected to the tamper sensor and to the protected circuit. The tamper response circuit executes a protection operation to secure the protected circuit in response to the fault signal.
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