公开(公告)号：US09026895B2

公开(公告)日：2015-05-05

申请号：US13750459

申请日：2013-01-25

Applicant: Silicon Motion, Inc.

Inventor： Hsu-Ping Ou

IPC: G06F12/02 ,  G06F11/10 ,  G11C29/44 ,  G06F3/06 ,  G11C29/04

CPC classification number: G06F12/0246 ,  G06F3/0619 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/10 ,  G11C29/44 ,  G11C2029/0401 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: A flash memory controller includes a read/write unit, a state machine, a processing unit, and an auxiliary unit. The read/write unit is connected to a flash memory and performs a writing command or a reading command. The state machine is configured to determine a state of the flash memory controller. The processing unit is connected to the read/write unit and the state machine and configured to control the read/write unit. The auxiliary unit is connected to a first data line and a second data line and the processing unit and configured to receive and store a string output from the processing unit. The auxiliary unit outputs the string through the first and second data lines when the flash memory controller completes a writing data transmission.

Abstract translation: 闪存控制器包括读/写单元，状态机，处理单元和辅助单元。 读/写单元连接到闪存并执行写入命令或读取命令。 状态机被配置为确定闪存控制器的状态。 处理单元连接到读/写单元和状态机，并且被配置为控制读/写单元。 辅助单元连接到第一数据线和第二数据线，并且处理单元被配置为接收并存储从处理单元输出的字符串。 当闪存控制器完成写入数据传输时，辅助单元通过第一和第二数据线输出该串。

公开(公告)号：US09009571B2

公开(公告)日：2015-04-14

申请号：US13947979

申请日：2013-07-22

Applicant: Silicon Motion, Inc.

Inventor： Cheng-Wei Liu ,  Hsu-Ping Ou

IPC: G11C29/00 ,  G06F11/10

CPC classification number: G06F11/1048

Abstract: A storage medium receiving write data provided by a host device, providing read data to the host and including a first module and a second module is disclosed. The first module includes a first memory cell and a first controller. The first memory cell stores the write data. The first controller reads the first memory cell to generate a first accessing result. The second module includes a second memory cell and a second controller. The second memory cell stores the write data. The second controller reads the second memory cell. When the first accessing result has an error and the error cannot be corrected by the first controller, the first controller requests the second controller to read the second memory cell to generate a second accessing result, and the second controller serves the second accessing result as the read data and provides the read data to the host.

Abstract translation: 接收由主机设备提供的写数据的存储介质，向主机提供读数据并且包括第一模块和第二模块。 第一模块包括第一存储单元和第一控制器。 第一个存储单元存储写入数据。 第一控制器读取第一存储器单元以产生第一访问结果。 第二模块包括第二存储单元和第二控制器。 第二存储单元存储写入数据。 第二控制器读取第二存储单元。 当第一访问结果具有错误并且第一控制器不能纠正错误时，第一控制器请求第二控制器读取第二存储器单元以产生第二访问结果，并且第二控制器将第二访问结果作为 读取数据并将读取的数据提供给主机。

公开(公告)号：US20140068147A1

公开(公告)日：2014-03-06

申请号：US13752502

申请日：2013-01-29

Applicant: SILICON MOTION, INC.

Inventor： Hsu-Ping Ou

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F11/2089 ,  G06F11/2092 ,  G11C29/00

Abstract: A flash memory controller is provided. The flash memory controller includes a read/write unit, a state machine, a processing unit, and a reserve unit. The read/write unit is coupled to a flash memory. The read/write unit is configured to perform a write command or a read command. The state machine is configured to determine a state of the flash memory controller. The processing unit is coupled to the read/write unit and the state machine. The processing unit is configured to control the read/write unit. The reserve unit is coupled to a first data line, a second data line, and the read/write unit. When the flash memory controller is operating abnormally, the reserve unit receives an external signal via the first data line and the second data line and controls the read/write unit according to the external signal.

Abstract translation: 提供闪存控制器。 闪速存储器控制器包括读/写单元，状态机，处理单元和预留单元。 读/写单元耦合到闪存。 读/写单元被配置为执行写命令或读命令。 状态机被配置为确定闪存控制器的状态。 处理单元耦合到读/写单元和状态机。 处理单元被配置为控制读/写单元。 备用单元耦合到第一数据线，第二数据线和读/写单元。 当闪存控制器运行异常时，预留单元通过第一数据线和第二数据线接收外部信号，并根据外部信号控制读/写单元。

公开(公告)号：US20140036603A1

公开(公告)日：2014-02-06

申请号：US13917007

申请日：2013-06-13

Applicant: Silicon Motion, Inc.

Inventor： Hsu-Ping Ou

IPC: G11C7/00

CPC classification number: G11C7/00 ,  G11C29/08 ,  G11C29/16 ,  G11C29/38 ,  G11C2029/0405 ,  G11C2029/1208 ,  G11C2029/2602

Abstract: A storage medium including a processing module and a cell array. The processing module receives test data according to a write command. The cell array stores the test data. The processing module receives verify data according to a comparison command, reads the test data stored in the cell array to generate access data, and compares the access data with the verify data to generate a compared report.

Abstract translation: 一种包括处理模块和单元阵列的存储介质。 处理模块根据写命令接收测试数据。 单元阵列存储测试数据。 处理模块根据比较命令接收验证数据，读取存储在单元阵列中的测试数据以产生访问数据，并将访问数据与验证数据进行比较以生成比较报告。