Abstract:
Methods and apparatus to increase efficiency of a power converter using a bias voltage on a low side drive gate are disclosed. An example power converter includes an inductor; a transistor coupled to the inductor; and a driver coupled to a gate of the transistor, the driver to apply (A) a first voltage to the gate to enable the transistor, (B) a second voltage to the gate to disable the transistor, and (C) a third voltage to the gate during a transition between applying the first voltage and the second voltage, the third voltage being between the first voltage and the second voltage.
Abstract:
A multiphase DC-to-DC synchronous power converter, which has a number of converter channels that generate a corresponding number of current sense signals, blanks the current sense signals in a first converter channel for periods of time that correspond with the actions of the transistors in a second converter channel, where the actions result in noise spikes across the converter that falsely interfere with current sensing in the first converter channel.
Abstract:
A control circuit configured to control a switching power supply including a ramp generator configured to generate a triangular waveform. A comparator is configured to generate a series of pulse width modulated (PWM) pulses at a first frequency and to regulate the switching power supply. The ramp generator includes a capacitor, a charging current source configured to provide a charging current to charge the capacitor, and a discharging current source configured to provide a discharging current to discharge the capacitor. The ramp generator also includes a closed loop current balancing current source configured to balance the currents from the charging and discharging current sources to establish a substantially zero direct current (DC) bias across the capacitor. The controller also includes a multi-phase configuration to provide a stackable multi-channel architecture.
Abstract:
Pulse width modulation controller apparatus and techniques are presented for balancing output currents of DC-DC converter stages in a multi-stage DC-DC conversion system in which a reference current is provided according to an input voltage and the value of a connected resistor, and a correction current output signal is generated that represents the difference between an average converter stage load current and the local load current, with the on-time of the PWM output signal being generated by charging a capacitance using a charging current obtained by offsetting the reference current output signal with the correction current output signal.