公开(公告)号：US20180361422A1

公开(公告)日：2018-12-20

申请号：US15939305

申请日：2018-03-29

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Jui-Min Lee ,  Ching-Hsiang Chang ,  Cheng-Hsu Huang ,  Yi-Wei Chen ,  Wei-Hsin Liu ,  Shih-Fang Tzou

IPC: B05D1/00 ,  B05C11/08 ,  H01L21/02 ,  H01L21/762

Abstract: A spin-on-dielectric process includes the following steps. A substrate is provided. A flowable material is spread on a surface of the substrate to forma spin-on-dielectric layer on the substrate, wherein the flowable material is heated to a temperature higher than 25° C.

公开(公告)号：US20180212034A1

公开(公告)日：2018-07-26

申请号：US15869005

申请日：2018-01-11

Applicant: UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

Inventor： Kai-Jiun Chang ,  Tsun-Min Cheng ,  Chih-Chieh Tsai ,  Jui-Min Lee ,  Yi-Wei Chen ,  Chia-Lung Chang ,  Wei-Hsin Liu

IPC: H01L29/49 ,  H01L29/66 ,  H01L21/28 ,  H01L21/285 ,  H01L27/108

Abstract: A method for manufacturing a semiconductor device with a cobalt silicide film is provided in the present invention. The method includes the steps of providing a silicon structure with an interlayer dielectric formed thereon, forming a contact hole in the interlayer dielectric to expose the silicon structure, depositing a cobalt film on the exposed silicon structure at a temperature between 300° C-400° C., wherein a cobalt protecting film is in-situ formed on the surface of the cobalt film, performing a rapid thermal process to transform the cobalt film into a cobalt silicide film, and removing untransformed cobalt film.

公开(公告)号：US09034726B2

公开(公告)日：2015-05-19

申请号：US14285645

申请日：2014-05-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Chien Liu ,  Chia-Lung Chang ,  Jei-Ming Chen ,  Jui-Min Lee ,  Yuh-Min Lin

IPC: H01L21/762 ,  H01L29/06

CPC classification number: H01L21/76224 ,  H01L29/0649

Abstract: A semiconductor structure is located in a recess of a substrate. The semiconductor structure includes a liner, a silicon rich layer and a filling material. The liner is located on the surface of the recess. The silicon rich layer is located on the liner. The filling material is located on the silicon rich layer and fills the recess. Furthermore, a semiconductor process forming said semiconductor structure is also provided.

Abstract translation: 半导体结构位于衬底的凹部中。 半导体结构包括衬垫，富硅层和填充材料。 衬垫位于凹槽的表面上。 富硅层位于衬套上。 填充材料位于富硅层上并填充凹槽。 此外，还提供了形成所述半导体结构的半导体工艺。