公开(公告)号：US20160293593A1

公开(公告)日：2016-10-06

申请号：US14691126

申请日：2015-04-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Mei-Ling Chao ,  Yi-Chun Chen ,  Li-Cih Wang ,  Tien-Hao Tang

IPC: H01L27/02 ,  H01L29/08 ,  H01L29/36 ,  H01L29/10

CPC classification number: H01L27/0266 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/36

Abstract: A semiconductor structure comprises a well, a first lightly doped region, a second lightly doped region, a first heavily doped region, a second heavily doped region and a gate. The first lightly doped region is disposed in the well. The second lightly doped region is disposed in the well and separated from the first lightly doped region. The first heavily doped region is disposed in the first lightly doped region. The second heavily doped region is partially disposed in the second lightly doped region. The second heavily doped region has a surface contacting the well. The gate is disposed on the well between the first heavily doped region and the second heavily doped region. The well has a first doping type. The first lightly doped region, the second lightly doped region, the first heavily doped region and the second heavily doped region have a second doping type.

Abstract translation: 半导体结构包括阱，第一轻掺杂区，第二轻掺杂区，第一重掺杂区，第二重掺杂区和栅极。 第一轻掺杂区域设置在阱中。 第二轻掺杂区域设置在阱中并与第一轻掺杂区域分离。 第一重掺杂区域设置在第一轻掺杂区域中。 第二重掺杂区域部分地设置在第二轻掺杂区域中。 第二重掺杂区域具有接触阱的表面。 栅极设置在第一重掺杂区域和第二重掺杂区域之间的阱上。 该井具有第一种掺杂型。 第一轻掺杂区域，第二轻掺杂区域，第一重掺杂区域和第二重掺杂区域具有第二掺杂类型。