公开(公告)号：US11563940B2

公开(公告)日：2023-01-24

申请号：US17490637

申请日：2021-09-30

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/117 ,  H04N19/103 ,  H04N19/176 ,  H04N19/182

Abstract: Various embodiments provide a decoder configured to select a filter based on a block size of a first block and a block size of a second block in an image, and change values of pixels in the first block and the second block. The filter includes a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block. The values of the pixels in the first block and the second block are changed by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets.

公开(公告)号：US11558635B2

公开(公告)日：2023-01-17

申请号：US17323936

申请日：2021-05-18

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N11/02 ,  H04N19/52 ,  H04N19/119 ,  H04N19/176

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.

公开(公告)号：US11553204B2

公开(公告)日：2023-01-10

申请号：US17349459

申请日：2021-06-16

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Tadamasa Toma ,  Kiyofumi Abe ,  Takahiro Nishi

IPC: H04N19/52 ,  H04N19/176 ,  H04N19/124 ,  H04N19/122 ,  H04N19/44

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry performs a primary transform on a derived prediction error, performs a secondary transform on a result of the primary transform, quantizes a result of the secondary transform, and encodes a result of the quantization as data of an image. When a current block to be processed has a predetermined shape, the encoder performs the secondary transform using, among secondary transform basis candidates that are secondary bases usable in the secondary transform, only a secondary transform basis candidate having a size that is not largest size containable in the current block.

公开(公告)号：US11523191B2

公开(公告)日：2022-12-06

申请号：US17402827

申请日：2021-08-16

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Noritaka Iguchi ,  Tadamasa Toma ,  Hisaya Katou

IPC: H04N21/643 ,  H04N21/43 ,  H04L7/00 ,  H04N21/236 ,  H04N21/2381 ,  H04N21/242 ,  H04N21/262 ,  H04N21/438 ,  H04N21/61

Abstract: A transmission method includes generating one or more frames for content transfer using IP (Internet Protocol) packets, and transmitting the one or more generated frames by broadcast. Each of the one or more frames contains a plurality of second transfer units, each of the plurality of second transfer units contains one or more first transfer units, and each of the one or more first transfer units contains at least one of the IP packets. An object IP packet of the IP packets which is stored in a first transfer unit positioned at a head in the one or more frames contains reference clock information that indicates time for reproduction of the content in data structure different from data structure of an MMT (MPEG Media Transport) packet, and header compression processing on the object IP packet is omitted.

公开(公告)号：US11503281B2

公开(公告)日：2022-11-15

申请号：US17681051

申请日：2022-02-25

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Han Boon Teo ,  Che Wei Kuo ,  Hai Wei Sun ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/105 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.

公开(公告)号：US11477485B2

公开(公告)日：2022-10-18

申请号：US17510519

申请日：2021-10-26

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe ,  Ryuichi Kanoh ,  Luca Rigazio ,  Alec Hodgkinson

IPC: H04N19/61 ,  H04N19/503

Abstract: The encoder includes processing circuitry, and memory. Using the memory, the processing circuitry: generates a predicted image of an input image that is a current image to be encoded, based on generated data output from a generator network in response to a reference image being input to the generator network, the generator network being a neural network; calculates a prediction error by subtracting the predicted image from the input image; and generates an encoded image by at least transforming the prediction error.

公开(公告)号：US11463724B2

公开(公告)日：2022-10-04

申请号：US17342076

申请日：2021-06-08

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Takashi Hashimoto

IPC: H04N19/52 ,  H04N19/124 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in inter prediction processing: derives a first motion vector of a current block to be processed, using a motion vector of a previous block which has been previously processed; derives a second motion vector of the current block by performing motion estimation in the vicinity of the first motion vector; and generates a prediction image of the current block by performing motion compensation using the second motion vector.

公开(公告)号：US11425411B2

公开(公告)日：2022-08-23

申请号：US17317312

申请日：2021-05-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Ru Ling Liao ,  Han Boon Teo ,  Hai Wei Sun ,  Che Wei Kuo ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/00 ,  H04N19/513 ,  H04N19/139 ,  H04N19/159 ,  H04N19/176

Abstract: Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.

公开(公告)号：US11375207B2

公开(公告)日：2022-06-28

申请号：US17188448

申请日：2021-03-01

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Masato Ohkawa ,  Hideo Saitou ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/159 ,  H04N19/176 ,  H04N19/61 ,  H04N19/625

Abstract: An encoder which encodes a current block of a picture includes a processor and memory. Using the memory, the processor: determines whether intra prediction is to be used for the current block; and when it is determined that intra prediction is to be used for the current block, generates first transform coefficients by performing first transform of residual signals of the current block using a first transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode and the first transform basis is different from a determined transform basis; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode for the current block is not the determined mode or when the first transform basis matches the determined transform basis.

公开(公告)号：US11368703B2

公开(公告)日：2022-06-21

申请号：US16587961

申请日：2019-09-30

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Ru Ling Liao ,  Han Boon Teo ,  Takahiro Nishi ,  Ryuichi Kanoh ,  Tadamasa Toma

IPC: H04N19/96 ,  H04N19/44 ,  H04N19/119 ,  H04N19/124 ,  H04N19/13 ,  H04N19/159 ,  H04N19/176

Abstract: An image decoder splits a block of a picture into a plurality of sub blocks in a first direction using a first partition mode; and decodes the plurality of sub blocks, wherein, when the block is sized N pixels by 2N pixels and the first direction is along the 2N pixels, N being an integer, the first partition mode includes splitting the block into the plurality of sub blocks including at least one sub block sized N/4 pixels by 2N pixels, and excludes splitting the block into two sub blocks sized N/2 pixels by 2N pixels.