公开(公告)号：US07861203B2

公开(公告)日：2010-12-28

申请号：US11768839

申请日：2007-06-26

申请人： David White ,  Eric Nequist

发明人： David White ,  Eric Nequist

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5072

摘要： Disclosed is a method, system, and computer program product for implementing model-based floorplanning, layout, placement, and routing. Models are used to guide the placement and routing of polygons on the IC layout based upon predictions of manufacturing variations.

摘要翻译： 公开了一种用于实现基于模型的布局规划，布局，布置和路由的方法，系统和计算机程序产品。 基于制造变化的预测，模型用于指导IC布局上的多边形的放置和布线。

公开(公告)号：US07665045B1

公开(公告)日：2010-02-16

申请号：US11229320

申请日：2005-09-15

申请人： Eric Nequist

发明人： Eric Nequist

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F17/5045 ,  G06F17/5081 ,  G06F17/509

摘要： A method and mechanism is disclosed for identifying and tracking nets in an electrical design. A hierarchical design does not have to be flattened to perform the operation of identifying and tracking nets. To identify sets of connected shapes, instead of having to unfold the entire design hierarchy, only the specific instances of shapes falling within the geometric bounds of shapes identified as being part of a net needs to be unfolded to perform the search. When composing the list of nets for a hierarchical design, the unfolded shapes at other hierarchical levels of the design can be derived based upon virtual terminal structures that implicitly references nets and objects at other levels.

摘要翻译： 公开了用于在电气设计中识别和跟踪网络的方法和机构。 层次化设计不需要被平坦化，以执行识别和跟踪网络的操作。 为了识别连接形状的集合，而不是必须展开整个设计层次结构，只有落在被识别为网络一部分的形状的几何界限内的特定形状实例需要展开才能执行搜索。 当组合层次设计的网络列表时，可以基于虚拟终端结构来导出设计的其他层次级别的展开形状，这些虚拟终端结构隐含地引用其他级别的网络和对象。

公开(公告)号：US20090172625A1

公开(公告)日：2009-07-02

申请号：US11964676

申请日：2007-12-26

申请人： Eric Nequist

发明人： Eric Nequist

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A method and mechanism is disclosed for identifying spacing and clearance based rule violations in an IC design. Shadows are employed to identify spacing and clearance based rule violations. The shadow approach of is particularly useful to identify width-dependent spacing and clearance violations, while avoiding false positives that exist with alternate approaches. The embodiments can be used with any type, configuration, or shape of layout objects.

摘要翻译： 公开了一种用于在IC设计中识别基于间隔和间隙的规则违规的方法和机构。 使用阴影来识别基于间隔和间隙的规则违规。 阴影方法特别有助于识别宽度相关的间隔和间隙违规，同时避免存在替代方法的假阳性。 实施例可以与布局对象的任何类型，配置或形状一起使用。

公开(公告)号：US20080163134A1

公开(公告)日：2008-07-03

申请号：US11648150

申请日：2006-12-29

申请人： Eric Nequist ,  Richard Brashears

发明人： Eric Nequist ,  Richard Brashears

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F17/5077

摘要： Disclosed is a method, system, and computer program product for implementing model-based layout, placement, and routing. Models are used to guide the placement and routing of polygons on the IC layout. In effect, the parameters that are used for placement and routing are guided by the model data so that the layout can be formed with a high degree of manufacturability from the outset.

摘要翻译： 公开了一种用于实现基于模型的布局，布局和路由的方法，系统和计算机程序产品。 模型用于指导IC布局上多边形的放置和布线。 实际上，用于放置和布线的参数由模型数据引导，从而可以从一开始就以高度的可制造性形成布局。

公开(公告)号：US06983440B1

公开(公告)日：2006-01-03

申请号：US10342824

申请日：2003-01-14

申请人： Eric Nequist

发明人： Eric Nequist

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： A method of simulating a design of an electronic system having multiple layers includes, for each layer, storing a plurality of shape occurrences for the layer. A hierarchy of shape instances having a plurality of levels is generated. Each shape instance corresponds to one of the shape occurrences. A hierarchy of shadow instances having a plurality of levels is generated.

摘要翻译： 模拟具有多个层的电子系统的设计的方法包括针对每个层存储该层的多个形状事件。 生成具有多个级别的形状实例的层次结构。 每个形状实例对应于形状发生之一。 生成具有多个级别的阴影实例的层次结构。