公开(公告)号：US20140040577A1

公开(公告)日：2014-02-06

申请号：US13565985

申请日：2012-08-03

Applicant: Ahmed Gheith ,  Eric Van Hensbergen ,  James Xenidis

Inventor： Ahmed Gheith ,  Eric Van Hensbergen ,  James Xenidis

IPC: G06F12/10 ,  G06F12/16

CPC classification number: G06F12/023

Abstract: A mechanism is provided for automatic use of large pages. An operating system loader performs aggressive contiguous allocation followed by demand paging of small pages into a best-effort contiguous and naturally aligned physical address range sized for a large page. The operating system detects when the large page is fully populated and switches the mapping to use large pages. If the operating system runs low on memory, the operating system can free portions and degrade gracefully.

Abstract translation: 提供了一种自动使用大页面的机制。 操作系统加载器执行积极的连续分配，然后将小页面的需求寻呼到为大页面设置的尽力而为的连续且自然对准的物理地址范围。 操作系统检测大页面何时完全填充，并将映射切换为使用大页面。 如果操作系统内存不足，操作系统可以释放部分并正常降级。

公开(公告)号：US20120185678A1

公开(公告)日：2012-07-19

申请号：US13435123

申请日：2012-03-30

Applicant: Becky Bruce ,  Giles R. Frazier ,  Bradly G. Frey ,  Kumar K. Gala ,  Cathy May ,  Michael D. Snyder ,  Gary Whisenhunt ,  James Xenidis

Inventor： Becky Bruce ,  Giles R. Frazier ,  Bradly G. Frey ,  Kumar K. Gala ,  Cathy May ,  Michael D. Snyder ,  Gary Whisenhunt ,  James Xenidis

IPC: G06F9/38

CPC classification number: G06F9/30101 ,  G06F9/30123 ,  G06F9/3851 ,  G06F9/3857 ,  G06F9/3889

Abstract: A technique for indicating a safe shared resource condition with respect to a disabled thread provides a mechanism for providing a fast indication to other hardware threads that a temporarily disabled thread can no longer impact shared resources, such as shared special-purpose registers and translation look-aside buffers within the processor core. Signals from pipelines within the core indicates whether any of the instructions pending in the pipeline impact the shared resources and if not, then the thread disable status is presented to the other threads via a state change in a thread status register. Upon receiving an indication that a particular hardware thread is to be disabled, control logic halts the dispatch of instructions for the particular hardware thread, and then waits until any indication that a shared resource is impacted by an instruction has cleared. Then the control logic updates the thread status to indicate the thread is disabled.

Abstract translation: 用于指示关于被禁用线程的安全共享资源状况的技术提供了一种用于向其他硬件线程提供快速指示的机制，临时禁用的线程不再影响共享资源，例如共享专用寄存器和翻译查找， 处理器核心内的缓冲区。 来自核心内的流水线的信号表示流水线中的任何待执行的任何指示是否影响共享资源，如果没有，则通过线程状态寄存器中的状态更改将线程禁用状态呈现给其他线程。 在接收到特定硬件线程被禁用的指示时，控制逻辑停止对特定硬件线程的指令的分派，然后等待直到由指令影响共享资源的任何指示已经被清除。 然后控制逻辑更新线程状态以指示线程被禁用。

公开(公告)号：US20110208949A1

公开(公告)日：2011-08-25

申请号：US12708791

申请日：2010-02-19

Applicant: Becky Bruce ,  Giles R. Frazier ,  Bradly G. Frey ,  Kumar K. Gala ,  Cathy May ,  Michael D. Snyder ,  Gary Whisenhunt ,  James Xenidis

Inventor： Becky Bruce ,  Giles R. Frazier ,  Bradly G. Frey ,  Kumar K. Gala ,  Cathy May ,  Michael D. Snyder ,  Gary Whisenhunt ,  James Xenidis

IPC: G06F9/38

CPC classification number: G06F9/30101 ,  G06F9/30123 ,  G06F9/3851 ,  G06F9/3857

Abstract: A technique for indicating a safe shared resource condition with respect to a disabled thread provides a mechanism for providing a fast indication to other hardware threads that a temporarily disabled thread can no longer impact shared resources, such as shared special-purpose registers and translation look-aside buffers within the processor core. Signals from pipelines within the core indicates whether any of the instructions pending in the pipeline impact the shared resources and if not, then the thread disable status is presented to the other threads via a state change in a thread status register. Upon receiving an indication that a particular hardware thread is to be disabled, control logic halts the dispatch of instructions for the particular hardware thread, and then waits until any indication that a shared resource is impacted by an instruction has cleared. Then the control logic updates the thread status to indicate the thread is disabled.

Abstract translation: 用于指示关于被禁用线程的安全共享资源状况的技术提供了一种用于向其他硬件线程提供快速指示的机制，临时禁用的线程不再影响共享资源，例如共享专用寄存器和翻译查找， 处理器核心内的缓冲区。 来自核心内的流水线的信号表示流水线中的任何待执行的任何指示是否影响共享资源，如果没有，则通过线程状态寄存器中的状态更改将线程禁用状态呈现给其他线程。 在接收到特定硬件线程被禁用的指示时，控制逻辑停止对特定硬件线程的指令的分派，然后等待直到由指令影响共享资源的任何指示已经被清除。 然后控制逻辑更新线程状态以指示线程被禁用。

公开(公告)号：US20110072247A1

公开(公告)日：2011-03-24

申请号：US12563222

申请日：2009-09-21

Applicant: Hubertus Franke ,  James Xenidis ,  Terry L. Nelms, II ,  Hollis R. Blanchard

Inventor： Hubertus Franke ,  James Xenidis ,  Terry L. Nelms, II ,  Hollis R. Blanchard

IPC: G06F9/00

CPC classification number: G06F9/4812

Abstract: Methods, systems, and computer program products for implementing fast application programmable timers are provided. A computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a request to set a user accessible timer, the request received from an application thread. The user accessible timer is set in response to receiving the request, the setting including initializing a counter. The counter is decremented until an interrupt threshold has been reached. An interrupt signal is transmitted to the application thread in response to detecting that the interrupt threshold has been reached.

Abstract translation: 提供了实现快速应用可编程定时器的方法，系统和计算机程序产品。 计算机程序产品包括可由处理电路读取的有形存储介质，并存储由处理电路执行以执行方法的指令。 该方法包括接收从应用程序线程接收到的请求以设置用户可访问定时器。 响应于接收到请求而设置用户可访问定时器，该设置包括初始化计数器。 计数器递减直到达到中断阈值。 响应于检测到已经达到中断阈值，中断信号被发送到应用线程。

公开(公告)号：US20080235679A1

公开(公告)日：2008-09-25

申请号：US12131348

申请日：2008-06-02

Applicant: Maximino Aguilar ,  Alex Chunghen Chow ,  Michael Norman Day ,  Michael Stan Gowen ,  Mark Richard Nutter ,  James Xenidis

Inventor： Maximino Aguilar ,  Alex Chunghen Chow ,  Michael Norman Day ,  Michael Stan Gowen ,  Mark Richard Nutter ,  James Xenidis

IPC: G06F9/445

CPC classification number: G06F9/44557 ,  G06F9/44526

Abstract: Loading software on a plurality of processors is presented. A processing unit (PU) retrieves a file from system memory and loads it into its internal memory. The PU extracts a processor type from the file's header which identifies whether the file should execute on the PU or a synergistic processing unit (SPU). If an SPU should execute the file, the PU DMA's the file to the SPU for execution. In one embodiment, the file is a combined file which includes both PU and SPU code. In this embodiment, the PU identifies one or more section headers included in the file which indicates embedded SPU code within the combined file. In this embodiment, the PU extracts the SPU code from the combined file and DMA's the extracted code to an SPU for execution.

Abstract translation: 在多个处理器上加载软件。 处理单元（PU）从系统存储器检索文件并将其加载到其内部存储器中。 PU从文件头中提取一种处理器类型，用于标识文件是否应在PU或协同处理单元（SPU）上执行。 如果SPU应该执行该文件，PU DMA将该文件提交给SPU执行。 在一个实施例中，该文件是包括PU和SPU代码的组合文件。 在该实施例中，PU识别包括在文件中的一个或多个区段标题，其指示组合文件内的嵌入式SPU代码。 在本实施例中，PU从组合文件中提取SPU代码，并将提取的代码DMA提取给SPU以执行。

公开(公告)号：US20080028408A1

公开(公告)日：2008-01-31

申请号：US11459669

申请日：2006-07-25

Applicant: MICHAEL N. DAY ,  Michael Karl Gschwind ,  Mark R. Nutter ,  James Xenidis

Inventor： MICHAEL N. DAY ,  Michael Karl Gschwind ,  Mark R. Nutter ,  James Xenidis

IPC: G06F9/46

CPC classification number: G06F9/5077

Abstract: A method, apparatus, and computer usable program code for logical partitioning and virtualization in heterogeneous computer architecture. In one illustrative embodiment, a portion of a first set of processors of a first type is allocated to a partition in a heterogeneous logically partitioned system and a portion of a second set of processors of a second type is allocated to the partition.

Abstract translation: 用于异构计算机体系结构中逻辑分区和虚拟化的方法，设备和计算机可用程序代码。 在一个说明性实施例中，第一类型的第一组处理器的一部分被分配给异构逻辑分区系统中的分区，并且第二类型的第二组处理器的一部分被分配给该分区。

公开(公告)号：US20070299990A1

公开(公告)日：2007-12-27

申请号：US11426588

申请日：2006-06-27

Applicant: Shmuel Ben-Yehuda ,  Scott Guthridge ,  Orran Yaakov Krieger ,  Zorik Machulsky ,  Julian Satran ,  Leah Shalev ,  Ilan Shimony ,  James Xenidis

Inventor： Shmuel Ben-Yehuda ,  Scott Guthridge ,  Orran Yaakov Krieger ,  Zorik Machulsky ,  Julian Satran ,  Leah Shalev ,  Ilan Shimony ,  James Xenidis

IPC: G06F13/28

CPC classification number: G06F12/1081 ,  G06F12/126 ,  G06F2212/1016 ,  G06F2212/1044

Abstract: A method and system for memory address translation and pinning are provided. The method includes attaching a memory address space identifier to a direct memory access (DMA) request, the DMA request is sent by a consumer and using a virtual address in a given address space. The method further includes looking up for the memory address space identifier to find a translation of the virtual address in the given address space used in the DMA request to a physical page frame. Provided that the physical page frame is found, pinning the physical page frame al song as the DMA request is in progress to prevent an unmapping operation of said virtual address in said given address space, and completing the DMA request, wherein the steps of attaching, looking up and pinning are centrally controlled by a host gateway.

Abstract translation: 提供了一种用于存储器地址转换和钉扎的方法和系统。 该方法包括将存储器地址空间标识符附加到直接存储器访问（DMA）请求，DMA请求由消费者发送并且使用给定地址空间中的虚拟地址。 该方法还包括查找存储器地址空间标识符以找到在DMA请求中使用的给定地址空间中的虚拟地址到物理页面帧的转换。 如果发现物理页框，则在进行DMA请求时固定物理页框al歌，以防止在所述给定地址空间中所述虚拟地址的解映射操作，并完成DMA请求，其中， 查找和固定由主机网关集中控制。

公开(公告)号：US20050086655A1

公开(公告)日：2005-04-21

申请号：US10670842

申请日：2003-09-25

Applicant: Maximino Aguilar ,  Alex Chow ,  Michael Day ,  Michael Gowen ,  Mark Nutter ,  James Xenidis

Inventor： Maximino Aguilar ,  Alex Chow ,  Michael Day ,  Michael Gowen ,  Mark Nutter ,  James Xenidis

IPC: G06F9/54 ,  G06F9/445 ,  G06F15/00 ,  G06F15/16 ,  G06F15/76

CPC classification number: G06F9/44557 ,  G06F9/44526

Abstract: A system and method for loading software on a plurality of processors is presented. A processing unit (PU) retrieves a file from system memory and loads it into its internal memory. The PU extracts a processor type from the file's header which identifies whether the file should execute on the PU or a synergistic processing unit (SPU). If an SPU should execute the file, the PU DMA's the file to the SPU for execution. In one embodiment, the file is a combined file which includes both PU and SPU code. In this embodiment, the PU identifies one or more section headers included in the file which indicates embedded SPU code within the combined file. In this embodiment, the PU extracts the SPU code from the combined file and DMA's the extracted code to an SPU for execution.

Abstract translation: 提出了一种用于在多个处理器上加载软件的系统和方法。 处理单元（PU）从系统存储器检索文件并将其加载到其内部存储器中。 PU从文件头中提取一种处理器类型，用于标识文件是否应在PU或协同处理单元（SPU）上执行。 如果SPU应该执行该文件，PU DMA将该文件提交给SPU执行。 在一个实施例中，该文件是包括PU和SPU代码的组合文件。 在该实施例中，PU识别包括在文件中的一个或多个区段标题，其指示组合文件内的嵌入式SPU代码。 在本实施例中，PU从组合文件中提取SPU代码，并将提取的代码DMA提取给SPU以执行。