Automatic phase and frequency adjustment circuit and method
    32.
    发明授权
    Automatic phase and frequency adjustment circuit and method 有权
    自动相位和频率调节电路及方法

    公开(公告)号:US07327400B1

    公开(公告)日:2008-02-05

    申请号:US09888271

    申请日:2001-06-21

    IPC分类号: H03L7/00

    CPC分类号: H03L7/18

    摘要: The invention is a circuit and method for automatically adjusting the phase and frequency of a pixel clock derived from analog image data. The circuit includes a phase locked loop circuit adapted to generate a phase locked loop clock responsive to a reference signal and an edge detector circuit adapted to generate an edge pulse signal corresponding to a transition of an analog data signal. A phase detector circuit is adapted to identify a phase of the phase locked loop clock associated to the transition of the analog data and thereby generate a phase adjust signal. A phase adjust circuit is adapted to generate a pixel clock by adjusting the phase of the phase locked loop clock responsive to the phase adjust signal.

    摘要翻译: 本发明是用于自动调整从模拟图像数据得出的像素时钟的相位和频率的电路和方法。 该电路包括适于产生响应于参考信号的锁相环时钟的锁相环电路和适于产生对应于模拟数据信号的转变的边沿脉冲信号的边缘检测器电路。 相位检测器电路适于识别与模拟数据的转换相关联的锁相环时钟的相位,从而产生相位调整信号。 相位调整电路适于通过响应于相位调整信号调整锁相环时钟的相位而产生像素时钟。

    Failsafe display of frame locked graphics
    33.
    发明授权
    Failsafe display of frame locked graphics 失效
    框架锁定图形的失效保护显示

    公开(公告)号:US07002564B1

    公开(公告)日:2006-02-21

    申请号:US10092180

    申请日:2002-03-06

    IPC分类号: G09G5/00

    CPC分类号: G09G5/005

    摘要: The invention describes a system including a failsafe mechanism adapted to visually display frame locked digital image data and a method therefor. The system receives input image data at an input vertical refresh rate and displays the image data at a vertical refresh rate that is a predetermined fraction of the input vertical refresh rate.

    摘要翻译: 本发明描述了一种包括适于可视地显示帧锁定的数字图像数据的故障保护机构的系统及其方法。 该系统以输入垂直刷新率接收输入图像数据,并以垂直刷新速率显示图像数据,其为输入垂直刷新率的预定分数。