公开(公告)号：US20080246042A1

公开(公告)日：2008-10-09

申请号：US11902229

申请日：2007-09-20

Applicant: Yu-Hsin Ting

Inventor： Yu-Hsin Ting

IPC: H01L33/00 ,  H01L21/441

CPC classification number: G02F1/136213 ,  G02F1/136227 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3265

Abstract: A pixel structure comprising at least one transistor, a first storage capacitor, a first conductive layer, an interlayer dielectric layer, a second conductive layer, a passivation layer, and a third conductive layer is provided. The first storage capacitor is electrically connected to the transistor. The interlayer dielectric layer having at least one first opening covers the first conductive layer. The second conductive layer is formed on a part of the interlayer dielectric layer and is electrically connected to the first conductive layer through the first opening. The passivation layer having at least one second opening covers the transistor and the second conductive layer. The third conductive layer is formed on a part of the passivation layer and is electrically connected to the transistor through the second opening. The first storage capacitor is formed by the third conductive layer, the passivation layer, and the second conductive layer.

Abstract translation: 提供了包括至少一个晶体管，第一存储电容器，第一导电层，层间介电层，第二导电层，钝化层和第三导电层的像素结构。 第一存储电容器电连接到晶体管。 具有至少一个第一开口的层间绝缘层覆盖第一导电层。 第二导电层形成在层间电介质层的一部分上，并通过第一开口与第一导电层电连接。 具有至少一个第二开口的钝化层覆盖晶体管和第二导电层。 第三导电层形成在钝化层的一部分上，并通过第二开口与晶体管电连接。 第一存储电容器由第三导电层，钝化层和第二导电层形成。

公开(公告)号：US20080100761A1

公开(公告)日：2008-05-01

申请号：US11802347

申请日：2007-05-22

Applicant: Yu-Hsin Ting ,  Ya-Chun Lee

Inventor： Yu-Hsin Ting ,  Ya-Chun Lee

IPC: G02F1/1343

CPC classification number: G02F1/136213 ,  G02F1/136227

Abstract: A pixel structure of the present invention includes two metal plates and a transistor. The metal plates are electrically connected together. The gate of the transistor receives a scan signal. The drain of the transistor receives a data signal. The source of the transistor includes two extending portions. A store capacitor is formed between the two extending portions and the two metal plates. The two extending portions are plate structures.

Abstract translation: 本发明的像素结构包括两个金属板和一个晶体管。 金属板电连接在一起。 晶体管的栅极接收扫描信号。 晶体管的漏极接收数据信号。 晶体管的源极包括两个延伸部分。 在两个延伸部分和两个金属板之间形成一个储存电容器。 两个延伸部分是板结构。

公开(公告)号：US20060158409A1

公开(公告)日：2006-07-20

申请号：US11332922

申请日：2006-01-17

Applicant: Xuan-Fang Shi ,  Yu-Hsin Ting ,  Jian-Shen Yu

Inventor： Xuan-Fang Shi ,  Yu-Hsin Ting ,  Jian-Shen Yu

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3648 ,  G09G2310/0248

Abstract: A driving circuit. The driving circuit includes a plurality of scan shift register cells, a pair of complementary clock signal lines, and a horizontal start signal generator. Each scan shift register cell comprises a bidirectional circuit, a shift register coupled to the bidirectional circuit, a transmission gate coupled to the shift register, and a data line coupled to the transmission gate. The complementary clock signal lines are coupled to the shift registers. The horizontal start signal generator provides a horizontal start signal to the bidirectional circuits in the first and a subsequent scan shift register cells. The shift register in each scan shift register cell provides an output signal to the bidirectional circuit in the next scan shift register cell. The bidirectional circuit in each scan shift register cell also receives the output signal from the shift register in the next scan shift register cell.

Abstract translation: 驱动电路。 驱动电路包括多个扫描移位寄存器单元，一对互补时钟信号线和水平启动信号发生器。 每个扫描移位寄存器单元包括双向电路，耦合到双向电路的移位寄存器，耦合到移位寄存器的传输门，以及耦合到传输门的数据线。 互补时钟信号线耦合到移位寄存器。 水平启动信号发生器向第一和随后的扫描移位寄存器单元中的双向电路提供水平启动信号。 每个扫描移位寄存器单元中的移位寄存器向下一个扫描移位寄存器单元中的双向电路提供输出信号。 每个扫描移位寄存器单元中的双向电路还从下一个扫描移位寄存器单元中的移位寄存器接收输出信号。