公开(公告)号：US11054883B2

公开(公告)日：2021-07-06

申请号：US16011476

申请日：2018-06-18

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Leonardo De Paula Rosa Piga ,  Samuel Naffziger ,  Ivan Matosevic ,  Indrani Paul

IPC: G06F1/324

Abstract: A power management algorithm framework proposes: 1) a Quality-of-Service (QoS) metric for throughput-based workloads; 2) heuristics to differentiate between throughput and latency sensitive workloads; and 3) an algorithm that combines the heuristic and QoS metric to determine target frequency for minimizing idle time and improving power efficiency without any performance degradation. A management algorithm framework enables optimizing power efficiency in server-class throughput-based workloads while still providing desired performance for latency sensitive workloads. The power savings are achieved by identifying workloads in which one or more cores can be run at a lower frequency (and consequently lower power) without a significant negative performance impact.