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公开(公告)号：US11862060B2
公开(公告)日：2024-01-02
申请号：US17770415
申请日：2021-03-18
发明人： Yan Yan , Xu Wang , Weitao Chen , Yu Ma , Zhiqiang Ma , Shunsha Lu
CPC分类号： G09G3/20 , G11C19/28 , G09G2310/0286 , G09G2320/02
摘要： A shift register, a gate drive circuit and a display device. During forward scanning, the first input circuit supplies a signal of a first reference signal terminal to a first node in response to a signal of a first input signal terminal at an input phase, and the second input circuit supplies a signal of a second reference signal terminal to the first node in response to a signal of a second input signal terminal at a reset phase; and during reverse scanning, the second input circuit supplies the signal of the second reference signal terminal to the first node in response to the signal of the second input signal terminal at the input phase, and the first input circuit supplies the signal of the first reference signal terminal to the first node in response to the signal of the first input signal terminal at the reset phase.
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公开(公告)号：US11295646B2
公开(公告)日：2022-04-05
申请号：US16073019
申请日：2017-11-21
摘要： The present application discloses a shift-register circuit used as a shift-register unit of current stage including a control sub-circuit coupled to a shift-register unit of previous stage and configured to recharge a pull-up node of the shift-register unit of previous stage during a touch-control operation performed after a gate line scanning of previous stage ends and before the gate line scanning of current stage starts. The control sub-circuit is further configured to compensate an internal voltage of the shift-register unit of previous stage before the touch-control operation ends so that the shift-register unit of previous stage is triggered to perform the gate line scanning of previous stage followed by the shift-register unit of current stage to perform the gate line scanning of current stage.
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公开(公告)号：US11263952B2
公开(公告)日：2022-03-01
申请号：US16475088
申请日：2018-12-27
摘要： A shift register unit includes a shift register circuit and a control circuit. The control circuit is electrically coupled to the shift register circuit and at least one control terminal, and is configured, based on at least one control signal respectively from the at least one control terminal, to output a hold signal to a pull-up node in the shift register circuit such that a high voltage maintains at the pull-up node during a specified time period. The shift register includes a plurality of shift register circuits cascadedly connected in stages, includes a first shift register circuit, which is coupled with a control circuit to form a shift register unit described above. The above shift register can be used in an array substrate in a display apparatus with touch control functionality.
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34.发明授权公开(公告)号：US11101013B2
公开(公告)日：2021-08-24
申请号：US16197460
申请日：2018-11-21
摘要： Disclosed are a shift register, a method for fabricating an inverter, a gate driving circuit, and a display device, and the shift register includes a first pull-down circuit, a second pull-down circuit, and a first inverter, where the first pull-down circuit is configured to operate under the control of a first level of a power source terminal, and to be disabled under the control of a second level of the power source terminal; and the first inverter is configured to provide the second pull-down circuit with a signal of a first signal terminal under the control of the first level of the power source terminal to disable the second pull-down circuit, and to provide the second pull-down circuit with a signal of a second signal terminal under the control of the second level of the power source terminal to drive the second pull-down circuit to operate.
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公开(公告)号：US10782575B2
公开(公告)日：2020-09-22
申请号：US16414515
申请日：2019-05-16
发明人： Hongming Zhan , Xibin Shao , Yu Ma , Chao Tian
IPC分类号： G02F1/1362 , H01L27/12 , G02F1/1335 , G02F1/1343 , G02F1/1368
摘要： Array substrate and display panel, and their fabrication methods are provided. The array substrate includes a first base substrate; a pixel electrode over the first base substrate; a first common electrode between the first base substrate and the pixel electrode; and a storage capacitor electrode, between the pixel electrode and the first common electrode and coupled with one of the pixel electrode and the first common electrode. Projections of the first common electrode and the pixel electrode on the first base substrate at least partially overlap with each other.
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公开(公告)号：US10423025B2
公开(公告)日：2019-09-24
申请号：US15542061
申请日：2017-01-23
IPC分类号： G02F1/1335 , H01L51/56 , G02F1/1333 , G02F1/1362 , G02F1/1368 , H01L27/32 , H01L51/00 , H01L51/52
摘要： The present application discloses a curved display panel having an array of a plurality of pixels along a first direction and a second direction intersecting the first direction. Each of the plurality of pixels includes at least three subpixels of different colors, the at least three subpixels in a same pixel are consecutively along the first direction, a plurality of subpixels consecutively along the second direction in a same row are of a same color from different pixels. The curved display panel includes a display surface curved along a curvature direction. The curvature direction is substantially parallel to the second direction.
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公开(公告)号：US09478565B2
公开(公告)日：2016-10-25
申请号：US14570095
申请日：2014-12-15
发明人： Yu Ma
IPC分类号： H01L27/12
CPC分类号： H01L27/124 , G02F2001/13456 , H01L27/1262
摘要： The embodiments of the present invention provide an array substrate, a method for fabricating the array substrate and a display panel. The array substrate comprises a first region and a second region adjoining the first region, a plurality of signal lines are provided in the first region, and a plurality of lead wires connected with the plurality of signal lines are provided in the second region, the array substrate comprises at least one conductive member, each conductive member is connected in parallel with one lead wire, and an overall resistance of the conductive member and the lead wire connected in parallel with the conductive member is smaller than a resistance of the lead wire connected in parallel with the conductive member.
摘要翻译： 本发明的实施例提供阵列基板，阵列基板的制造方法和显示面板。 阵列基板包括与第一区域相邻的第一区域和第二区域，在第一区域中设置多条信号线，并且在第二区域中设置与多条信号线连接的多条引线，阵列 衬底包括至少一个导电构件，每个导电构件与一个引线并联连接，并且与导电构件并联连接的导电构件和引线的总电阻小于连接在导电构件上的引线的电阻 与导电构件平行。
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公开(公告)号：US20150381977A1
公开(公告)日：2015-12-31
申请号：US14477979
申请日：2014-09-05
IPC分类号： H04N17/00
CPC分类号： H04N17/004 , G02F1/1362 , G02F2001/136254
摘要： The present disclosure relates to an array substrate and display device. The array substrate comprises a packaged region covered by a package, a non-packaged region other than the packaged region, and a test unit arranged within the non-packaged region, wherein the test unit is connected to a test point. The disclosure can be used in the manufacture of display panels.
摘要翻译： 本公开涉及阵列基板和显示装置。 阵列基板包括由封装覆盖的封装区域，除封装区域之外的非封装区域，以及布置在非封装区域内的测试单元，其中测试单元连接到测试点。 本公开可用于显示面板的制造。
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公开(公告)号：US10295873B2
公开(公告)日：2019-05-21
申请号：US15571141
申请日：2017-05-12
发明人： Xibin Shao , Lifeng Lin , Honglin Zhang , Hongming Zhan , Yu Ma , Kui Zhang , Chao Tian , Zhe Li
IPC分类号： G02F1/1362 , G02F1/1335 , G02F1/1343
摘要： In accordance with some embodiments of the disclosure, an array substrate and a related liquid crystal display device are provided. The array substrate can include a plurality of pixel electrodes arranged on a base substrate, and a conductive opaque line arranged between two neighboring pixel electrodes and overlapping with each of the two neighboring pixel electrodes along a width direction of the conductive opaque line.
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公开(公告)号：US20190227396A1
公开(公告)日：2019-07-25
申请号：US16373943
申请日：2019-04-03
发明人： Xibin Shao , Lifeng Lin , Honglin Zhang , Hongming Zhan , Yu Ma , Kui Zhang , Chao Tian , Zhe Li
IPC分类号： G02F1/1362 , G02F1/1343 , G02F1/1335
摘要： In accordance with some embodiments of the disclosure, an array substrate and a related liquid crystal display device are provided. The array substrate can include a plurality of pixel electrodes arranged on a base substrate, and a conductive opaque line arranged between two neighboring pixel electrodes and overlapping with each of the two neighboring pixel electrodes along a width direction of the conductive opaque line.
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