公开(公告)号：US07279413B2

公开(公告)日：2007-10-09

申请号：US10869658

申请日：2004-06-16

申请人： Dae-Gyu Park ,  Oleg G. Gluschenkov ,  Michael A. Gribelyuk ,  Kwong Hon Wong

发明人： Dae-Gyu Park ,  Oleg G. Gluschenkov ,  Michael A. Gribelyuk ,  Kwong Hon Wong

IPC分类号： H01L21/4763

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L21/28176 ,  H01L21/28185 ,  H01L21/28229 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

摘要： The present invention provides a method for depositing a dielectric stack comprising forming a dielectric layer atop a substrate, the dielectric layer comprising at least oxygen and silicon atoms; forming a layer of metal atoms atop the dielectric layer within a non-oxidizing atmosphere, wherein the layer of metal atoms has a thickness of less than about 15 Å; forming an oxygen diffusion barrier atop the layer of metal atoms, wherein the non-oxidizing atmosphere is maintained; forming a gate conductor atop the oxygen diffusion barrier; and annealing the layer of metal atoms and the dielectric layer, wherein the layer of metal atoms reacts with the dielectric layer to provide a continuous metal oxide layer having a dielectric constant ranging from about 25 to about 30 and a thickness less than about 15 Å.

摘要翻译： 本发明提供一种用于沉积电介质堆叠的方法，包括在衬底顶部形成电介质层，所述电介质层至少包含氧和硅原子; 在非氧化性气氛中在所述电介质层的顶部形成金属原子层，其中所述金属原子层具有小于约的厚度; 在金属原子层的上方形成氧扩散阻挡层，其中保持非氧化性气氛; 在氧扩散阻挡层上形成栅极导体; 以及退火所述金属原子层和所述介电层，其中所述金属原子层与所述电介质层反应以提供介电常数范围为约25至约30且厚度小于约的连续金属氧化物层。

公开(公告)号：US07205207B2

公开(公告)日：2007-04-17

申请号：US11060784

申请日：2005-02-18

申请人： Bruce B. Doris ,  Oleg G. Gluschenkov

发明人： Bruce B. Doris ,  Oleg G. Gluschenkov

IPC分类号： H01L21/76

CPC分类号： H01L21/84 ,  H01L21/823807 ,  H01L21/823878 ,  H01L29/66575 ,  H01L29/78 ,  H01L29/7846

摘要： A semiconductor device and method of manufacture provide an n-channel field effect transistor (nFET) having a shallow trench isolation with overhangs that overhang Si—SiO2 interfaces in a direction parallel to the direction of current flow and in a direction transverse to current flow. The device and method also provide a p-channel field effect transistor (pFET) having a shallow trench isolation with an overhang that overhangs Si—SiO2 interfaces in a direction transverse to current flow. However, the shallow trench isolation for the pFET is devoid of overhangs, in the direction parallel to the direction of current flow.

摘要翻译： 一种半导体器件和制造方法提供一种具有浅沟槽隔离的n沟道场效应晶体管（nFET），其具有在与电流流动方向平行的方向上突出Si-SiO 2界面; 在横向于电流的方向上。 器件和方法还提供具有浅沟槽隔离的p沟道场效应晶体管（pFET），其具有在横向于电流的方向上突出Si-SiO 2界面的突出端。 然而，pFET的浅沟槽隔离在平行于电流方向的方向上没有突出端。