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公开(公告)号:US20220076118A1
公开(公告)日:2022-03-10
申请号:US17404153
申请日:2021-08-17
Applicant: Intel Corporation
Inventor: Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag , Jeremie Dreyfuss , Amit Bleiweiss , Tomer Schwartz , Raanan Yonatan Yehezkel Rohekar , Michael Behar , Amitai Armon , Uzi Sarel
Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to receive a plurality of data inputs for training a neural network, wherein the data inputs comprise training data and weights inputs; represent the data inputs in a first form; and represent the weight inputs in a second form. Other embodiments are also disclosed and claimed.
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公开(公告)号:US20180314931A1
公开(公告)日:2018-11-01
申请号:US15499896
申请日:2017-04-28
Applicant: Intel Corporation
Inventor: Uzi Sarel , Ehud Cohen , Tomer Schwartz , Amitai Armon , Yahav Shadmiy , Amit Bleiweiss , Gal Leibovich , Jeremie Dreyfuss , Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag
CPC classification number: G06T1/20 , G06F9/30014 , G06F9/30025 , G06F9/30043 , G06N3/00
Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.
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公开(公告)号:US20240419956A1
公开(公告)日:2024-12-19
申请号:US18749806
申请日:2024-06-21
Applicant: Intel Corporation
Inventor: Eran Ben-Avi , Neta Zmora , Guy Jacob , Lev Faivishevsky , Jeremie Dreyfuss , Tomer Bar-On , Jacob Subag , Yaniv Fais , Shira Hirsch , Orly Weisel , Zigi Walter , Yarden Oren
Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.
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公开(公告)号:US11886984B2
公开(公告)日:2024-01-30
申请号:US17398302
申请日:2021-08-10
Applicant: Intel Corporation
Inventor: Uzi Sarel , Ehud Cohen , Tomer Schwartz , Amitai Armon , Yahav Shadmiy , Amit Bleiweiss , Gal Leibovich , Jeremie Dreyfuss , Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag
CPC classification number: G06N3/063 , G06F9/30014 , G06F9/30025 , G06F9/30043 , G06N3/044 , G06N3/045 , G06N3/084
Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.
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公开(公告)号:US20230394305A1
公开(公告)日:2023-12-07
申请号:US18325744
申请日:2023-05-30
Applicant: Intel Corporation
Inventor: Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag , Jeremie Dreyfuss , Amit Bleiweiss , Tomer Schwartz , Raanan Yonatan Yehezkel Rohekar , Michael Behar , Amitai Armon , Uzi Sarel
Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to receive a plurality of data inputs for training a neural network, wherein the data inputs comprise training data and weights inputs; represent the data inputs in a first form; and represent the weight inputs in a second form. Other embodiments are also disclosed and claimed.
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公开(公告)号:US11669719B2
公开(公告)日:2023-06-06
申请号:US17174864
申请日:2021-02-12
Applicant: Intel Corporation
Inventor: Jeremie Dreyfuss , Amit Bleiweiss , Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag , Eran Ben-Avi , Neta Zmora , Tomer Schwartz
IPC: G06N3/063 , G06N3/08 , G06N3/04 , G06N3/084 , G06V20/56 , G06V10/44 , G06F18/214 , G06N3/044 , G06N3/045 , G06V10/764 , G06V10/82 , G06F18/2413
CPC classification number: G06N3/063 , G06F18/214 , G06F18/24133 , G06N3/04 , G06N3/044 , G06N3/045 , G06N3/08 , G06N3/084 , G06V10/454 , G06V10/764 , G06V10/82 , G06V20/56
Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to save one or more outputs of a deep learning neural network in a storage system of an autonomous vehicle and upload the one or more outputs to a remote server. Other embodiments are also disclosed and claimed.
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公开(公告)号:US20220012163A1
公开(公告)日:2022-01-13
申请号:US17483431
申请日:2021-09-23
Applicant: Intel Corporation
Inventor: Niranjan Hasabnis , Justin Gottschlich , Jeremie Dreyfuss , Amitai Armon , Itamar Ben-Ari , Oren David Kimhi
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to detect code defects. An example apparatus includes repository interface circuitry to retrieve code repositories corresponding to a programming language of interest, tree generating circuitry to generate parse trees corresponding to code blocks contained in the code repositories, directed acyclic graph (DAG) circuitry to generate DAGs corresponding to respective ones of the parse trees, the DAGs including control flow information and data flow information, abstraction generating circuitry to abstract the DAGs, invariant identification circuitry to extract invariants from the abstracted DAGs, and DAG comparison circuitry to cluster respective ones of the extracted invariants to identify respective ones of the abstracted DAGs with common invariants.
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公开(公告)号:US20210350585A1
公开(公告)日:2021-11-11
申请号:US17344639
申请日:2021-06-10
Applicant: INTEL CORPORATION
Inventor: Tomer Bar-On , Jacob Subag , Yaniv Fais , Jeremie Dreyfuss , Gal Novik , Gal Leibovich , Tomer Schwartz , Ehud Cohen , Lev Faivishevsky , Uzi Sarel , Amitai Armon , Yahav Shadmiy
IPC: G06T9/00 , H04N19/42 , G06N3/04 , H04N19/436 , G06N3/08
Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.
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公开(公告)号:US20210256272A1
公开(公告)日:2021-08-19
申请号:US17174864
申请日:2021-02-12
Applicant: Intel Corporation
Inventor: Jeremie Dreyfuss , Amit Bleiweiss , Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag , Eran Ben-Avi , Neta Zmora , Tomer Schwartz
Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to save one or more outputs of a deep learning neural network in a storage system of an autonomous vehicle and upload the one or more outputs to a remote server. Other embodiments are also disclosed and claimed.
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公开(公告)号:US11037330B2
公开(公告)日:2021-06-15
申请号:US15482725
申请日:2017-04-08
Applicant: Intel Corporation
Inventor: Tomer Bar-On , Jacob Subag , Yaniv Fais , Jeremie Dreyfuss , Gal Novik , Gal Leibovich , Tomer Schwartz , Ehud Cohen , Lev Faivishevsky , Uzi Sarel , Amitai Armon , Yahav Shadmiy
IPC: G06T9/00 , H04N19/42 , G06N3/04 , H04N19/436 , G06N3/08
Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.
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