公开(公告)号：US11055604B2

公开(公告)日：2021-07-06

申请号：US15702193

申请日：2017-09-12

Applicant: Intel Corporation

Inventor： Yonatan Glesner ,  Gal Novik ,  Dmitri Vainbrand ,  Gal Leibovich

IPC: G06N3/04 ,  G06F3/06

Abstract: Methods and apparatus relating to techniques for incremental network quantization. In an example, an apparatus comprises logic, at least partially comprising hardware logic to determine a plurality of weights for a layer of a convolutional neural network (CNN) comprising a plurality of kernels; organize the plurality of weights into a plurality of clusters for the plurality of kernels; and apply a K-means compression algorithm to each of the plurality of clusters. Other embodiments are also disclosed and claimed.

公开(公告)号：US20190102673A1

公开(公告)日：2019-04-04

申请号：US15720298

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Gal Leibovich ,  Gal Novik ,  Yonatan Glesner

IPC: G06N3/08 ,  G06N3/04 ,  G06F17/30

Abstract: Methods and apparatus relating to online activation compression with K-means are described. In one embodiment, logic (e.g., in a processor) compresses one or more activation functions for a convolutional network based on non-uniform quantization. The non-uniform quantization for each layer of the convolutional network is performed offline, and an activation function for a specific layer of the convolutional network is quantized during runtime. Other embodiments are also disclosed and claimed.

公开(公告)号：US12131507B2

公开(公告)日：2024-10-29

申请号：US18191565

申请日：2023-03-28

Applicant: Intel Corporation

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048 ,  G06N3/084 ,  G06N3/088 ,  H04N19/42 ,  H04N19/436

CPC classification number: G06T9/002 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048 ,  G06N3/084 ,  G06N3/088 ,  H04N19/42 ,  H04N19/436

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

公开(公告)号：US20230316589A1

公开(公告)日：2023-10-05

申请号：US18191565

申请日：2023-03-28

Applicant: Intel Corporation

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00 ,  H04N19/42 ,  H04N19/436 ,  G06N3/084 ,  G06N3/088 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048

CPC classification number: G06T9/002 ,  H04N19/42 ,  H04N19/436 ,  G06N3/084 ,  G06N3/088 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

公开(公告)号：US11501152B2

公开(公告)日：2022-11-15

申请号：US15659853

申请日：2017-07-26

Applicant: Intel Corporation

Inventor： Raanan Yonatan Yehezkel Rohekar ,  Guy Koren ,  Shami Nisimov ,  Gal Novik

IPC: G06N3/08 ,  G06N3/04 ,  G06N7/00 ,  G06T1/20

Abstract: A mechanism is described for facilitating learning and application of neural network topologies in machine learning at autonomous machines. A method of embodiments, as described herein, includes monitoring and detecting structure learning of neural networks relating to machine learning operations at a computing device having a processor, and generating a recursive generative model based on one or more topologies of one or more of the neural networks. The method may further include converting the generative model into a discriminative model.

公开(公告)号：US11620766B2

公开(公告)日：2023-04-04

申请号：US17344639

申请日：2021-06-10

Applicant: INTEL CORPORATION

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00 ,  H04N19/42 ,  G06N3/04 ,  H04N19/436 ,  G06N3/084 ,  G06N3/088

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer.

公开(公告)号：US20190042917A1

公开(公告)日：2019-02-07

申请号：US16014495

申请日：2018-06-21

Applicant: INTEL CORPORATION

Inventor： Yaniv Gurwicz ,  Raanan Yonatan Yehezkel Rohekar ,  Shami Nisimov ,  Guy Koren ,  Gal Novik

IPC: G06N3/04 ,  G06N7/00 ,  G06K9/62 ,  G06F17/30

Abstract: Various embodiments are generally directed to techniques for determining artificial neural network topologies, such as by utilizing probabilistic graphical models, for instance. Some embodiments are particularly related to determining neural network topologies by bootstrapping a graph, such as a probabilistic graphical model, into a multi-graphical model, or graphical model tree. Various embodiments may include logic to determine a collection of sample sets from a dataset. In various such embodiments, each sample set may be drawn randomly for the dataset with replacement between drawings. In some embodiments, logic may partition a graph into multiple subgraph sets based on each of the sample sets. In several embodiments, the multiple subgraph sets may be scored, such as with Bayesian statistics, and selected amongst as part of determining a topology for a neural network.

公开(公告)号：US20180322385A1

公开(公告)日：2018-11-08

申请号：US15659853

申请日：2017-07-26

Applicant: Intel Corporation

Inventor： RAANAN YONATAN YEHEZKEL ROHEKAR ,  Guy Koren ,  Shami Nisimov ,  Gal Novik

IPC: G06N3/08 ,  G06N3/04

CPC classification number: G06N3/08 ,  G06N3/0445 ,  G06N3/0454 ,  G06N7/005 ,  G06T1/20

Abstract: A mechanism is described for facilitating learning and application of neural network topologies in machine learning at autonomous machines. A method of embodiments, as described herein, includes monitoring and detecting structure learning of neural networks relating to machine learning operations at a computing device having a processor, and generating a recursive generative model based on one or more topologies of one or more of the neural networks. The method may further include converting the generative model into a discriminative model.

公开(公告)号：US20180293758A1

公开(公告)日：2018-10-11

申请号：US15482725

申请日：2017-04-08

Applicant: Intel Corporation

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

公开(公告)号：US20250095217A1

公开(公告)日：2025-03-20

申请号：US18903291

申请日：2024-10-01

Applicant: Intel Corporation

Inventor： Tomer Bar-On ,  Jacob Subag ,  Yaniv Fais ,  Jeremie Dreyfuss ,  Gal Novik ,  Gal Leibovich ,  Tomer Schwartz ,  Ehud Cohen ,  Lev Faivishevsky ,  Uzi Sarel ,  Amitai Armon ,  Yahav Shadmiy

IPC: G06T9/00 ,  G06N3/044 ,  G06N3/045 ,  G06N3/047 ,  G06N3/048 ,  G06N3/084 ,  G06N3/088 ,  H04N19/42 ,  H04N19/436

Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.