公开(公告)号：US10268578B1

公开(公告)日：2019-04-23

申请号：US15721237

申请日：2017-09-29

Applicant: INTEL CORPORATION

Inventor： Shankar Natarajan ,  Aliasgar S. Madraswala ,  Wayne D. Tran

IPC: G06F3/06 ,  G06F12/0804

Abstract: In one embodiment, a nonvolatile memory of a component such as a storage drive preserves write data in the event of a write data programming failure in the memory. Write data is preserved in the event of cached writes by data preservation logic in registers and data recovery logic recovers the preserved data and outputs the recovered data from the storage drive. Other aspects are described herein.

公开(公告)号：US20190065075A1

公开(公告)日：2019-02-28

申请号：US16176465

申请日：2018-10-31

Applicant: Intel Corporation

Inventor： Suresh Nagarajan ,  Shankar Natarajan

IPC: G06F3/06

Abstract: An apparatus for controlling a solid state drive (SSD) includes an host interface, to receive a set of memory access commands from a host computer, and processing circuitry coupled to the host interface and to memory cells of the SSD, to distinguish the write commands from the read commands in the set, and execute up to a threshold number of the write commands prior to executing any of the read commands.