Data Coherence System
    31.
    发明申请
    Data Coherence System 失效
    数据一致性系统

    公开(公告)号:US20080082757A1

    公开(公告)日:2008-04-03

    申请号:US11949458

    申请日:2007-12-03

    IPC分类号: G06F13/28

    摘要: A data coherence system includes a generation number written to a data track of a logical sub-system. The generation number is compared to a corresponding generation number in a processing device when it is initialized. If the two generations numbers are the same, the generation numbers are incremented and saved. If not, cache associated with the logical sub-system residing within the processing device is erased and the generation numbers are reset.

    摘要翻译: 数据一致性系统包括写入逻辑子系统的数据轨道的生成号码。 当初始化时,将代数与处理装置中的相应代号进行比较。 如果两代人数相同,那么代数就会增加并保存。 如果不是,则与处理设备内的逻辑子系统相关联的缓存被擦除并且生成号被重置。

    EFFICIENT ACCUMULATION OF PERFORMANCE STATISTICS IN A MULTI-PORT NETWORK
    32.
    发明申请
    EFFICIENT ACCUMULATION OF PERFORMANCE STATISTICS IN A MULTI-PORT NETWORK 审中-公开
    多端口网络中性能统计的有效累积

    公开(公告)号:US20070076627A1

    公开(公告)日:2007-04-05

    申请号:US11555818

    申请日:2006-11-02

    IPC分类号: H04L12/66

    摘要: Computer networks are provided with a resource efficient ability to generate link performance statistics. To calculate the average link utilization per I/O operation, a first counter accumulates the number of I/O operations processed by a link and a second counter accumulates the time required by the link to complete each I/O operation. The second value is then divided by the first value. The number of operations per second for a link may be computed by dividing the first number by a predetermined period of time and the average number of operations using the link may be computed by dividing the second number by the predetermined period of time. A third counter may be employed to accumulate the number of bytes transferred by a link during each I/O operation. Then, average size of an I/O operation may be computed by dividing the third number by the first number and the average bandwidth per link operation may be computed by dividing the third number by the predetermined period of time. Separate sets of counters are preferably associated with each of several link types associated with a single port, thereby allowing separate statistics to be generated for each link type. The generated statistics are useful for such activities as problem resolution, load balancing and capacity planning.

    摘要翻译: 计算机网络具有生成链路性能统计资源的资源有效能力。 为了计算每个I / O操作的平均链路利用率,第一计数器累加由链路处理的I / O操作的数量,并且第二计数器累加链接完成每个I / O操作所需的时间。 然后将第二个值除以第一个值。 可以通过将第一个数除以预定时间段来计算每秒链接的操作次数,并且可以通过将第二个数除以预定时间段来计算使用该链接的平均操作次数。 可以使用第三计数器来累积每个I / O操作期间由链路传送的字节数。 然后,可以通过将第三个数除以第一个数字来计算I / O操作的平均大小,并且可以通过将第三个数除以预定时间段来计算每个链接操作的平均带宽。 单独的计数器组优选地与与单个端口相关联的几个链路类型中的每一个相关联,从而允许针对每个链路类型生成单独的统计信息。 生成的统计信息对于解决问题,负载平衡和容量规划等活动非常有用。

    Recovery from failure in data storage systems

    公开(公告)号:US20060107004A1

    公开(公告)日:2006-05-18

    申请号:US10991110

    申请日:2004-11-16

    IPC分类号: G06F12/16

    CPC分类号: G06F11/2089

    摘要: Provided are a method, system, and article of manufacture, wherein a command is received at a first computational device coupled to a first adapter that is capable of allowing access to a data storage to the first computational device. The first computational device sends the command to a second computational device. The command is processed by a second adapter coupled to the second computational device, wherein the second adapter allows the second computational device to access the data storage, and wherein the second adapter accesses memory in the first computational device to process the command. In certain embodiments, the first adapter that allows the first computational device to access the data storage has failed.

    Method, system, and program for transferring data directed to virtual memory addresses to a device memory
    34.
    发明申请
    Method, system, and program for transferring data directed to virtual memory addresses to a device memory 失效
    用于将指向虚拟存储器地址的数据传送到设备存储器的方法,系统和程序

    公开(公告)号:US20060101226A1

    公开(公告)日:2006-05-11

    申请号:US10982354

    申请日:2004-11-05

    IPC分类号: G06F12/10

    CPC分类号: G06F12/1081 G06F2212/206

    摘要: Provided are a method, system, and program for transferring data directed to virtual memory addresses to a device memory. Indicator bits are set for ranges of device memory addresses in a device accessible over an Input/Output (I/O) bus indicating whether gathering is enabled for the device memory address ranges. Transfer operations are processed to transfer data to contiguous device memory addresses in the device. A determination is made as to whether the indicator bits for the contiguous device memory addresses indicate that gathering is enabled. A single bus I/O transaction is generated to transfer data for the contiguous device memory addresses over the I/O bus in response to determining that the indicator bits for the contiguous device memory addresses indicate that gathering is enabled.

    摘要翻译: 提供了用于将指向虚拟存储器地址的数据传送到设备存储器的方法,系统和程序。 指示位设置在可通过输入/输出(I / O)总线访问的设备中的设备存储器地址的范围,指示是否对设备存储器地址范围进行采集。 处理传输操作将数据传输到设备中的连续设备存储器地址。 确定连续设备存储器地址的指示符位是否指示该采集被启用。 响应于确定连续设备存储器地址的指示符位表示启用了集合,生成单总线I / O事务以通过I / O总线传送连续设备存储器地址的数据。

    Apparatus and method to manage a data cache
    35.
    发明申请
    Apparatus and method to manage a data cache 有权
    用于管理数据高速缓存的设备和方法

    公开(公告)号:US20060080510A1

    公开(公告)日:2006-04-13

    申请号:US10964474

    申请日:2004-10-12

    IPC分类号: G06F12/00

    CPC分类号: G06F12/123 G06F12/0866

    摘要: A method is disclosed to manage a data cache. The method provides a data cache comprising a plurality of tracks, where each track comprises one or more segments. The method further maintains a first LRU list comprising one or more first tracks having a low reuse potential, maintains a second LRU list comprising one or more second tracks having a high reuse potential, and sets a target size for the first LRU list. The method then accesses a track, and determines if that accessed track comprises a first track. If the method determines that the accessed track comprises a first track, then the method increases the target size for said first LRU list. Alternatively, if the method determines that the accessed track comprises a second track, then the method decreases the target size for said first LRU list. The method demotes tracks from the first LRU list if its size exceeds the target size; otherwise, the method evicts tracks from the second LRU list.

    摘要翻译: 公开了一种管理数据高速缓存的方法。 该方法提供包括多个轨道的数据高速缓存,其中每个轨道包括一个或多个段。 该方法还维护包括具有低再利用潜力的一个或多个第一轨道的第一LRU列表,维护包括具有高重用潜力的一个或多个第二轨道的第二LRU列表,并设置第一LRU列表的目标大小。 然后,该方法访问轨道,并且确定所访问的轨道是否包括第一轨道。 如果方法确定所访问的轨道包括第一轨道,则该方法增加所述第一LRU列表的目标大小。 或者,如果该方法确定所访问的轨道包括第二轨道,则该方法减小所述第一LRU列表的目标大小。 该方法如果其大小超过目标大小,则会从第一个LRU列表中降低轨道; 否则,该方法从第二LRU列表中逐出轨道。

    Write unmodified data to controller read cache
    36.
    发明申请
    Write unmodified data to controller read cache 审中-公开
    将未修改的数据写入控制器读缓存

    公开(公告)号:US20060031639A1

    公开(公告)日:2006-02-09

    申请号:US10912847

    申请日:2004-08-06

    申请人: Michael Benhase

    发明人: Michael Benhase

    IPC分类号: G06F12/00

    摘要: Disclosed are a method and apparatus, in a data storage environment with multiple devices sharing data, for writing data to one such device in a manner that indicates that the data need not be destaged to a lower tier of the storage hierarchy. As a specific example, a host computer system may issue a write command to a controller that signals the controller that it is not necessary to destage the data from the controller cache because the data has not been modified by the host. In a preferred embodiment, the controller's cache is an extension of the host's cache, rather than a duplication. To achieve this, the controller needs to know: 1) what data, being requested by the host, is being cached by the host, and should not be cached by the controller, and 2) what data has been cast out of the host's cache, and should now be cached by the controller.

    摘要翻译: 公开了一种在具有共享数据的多个设备的数据存储环境中的方法和装置,用于以指示数据不需要去往存储层级的较低层的方式向一个这样的设备写入数据。 作为具体示例,主计算机系统可向发出控制器的控制器发出写入命令,该控制器不需要从控制器高速缓存中将数据退出,因为数据尚未被主机修改。 在优选实施例中,控制器的高速缓存是主机缓存的扩展,而不是重复。 为了实现这一点,控制器需要知道:1)主机正在请求什么数据被主机缓存,不应该被控制器缓存,2)什么数据被抛出主机缓存 ,现在应该由控制器缓存。