公开(公告)号：US06518147B1

公开(公告)日：2003-02-11

申请号：US09625112

申请日：2000-07-25

申请人： Flavio Francesco Villa ,  Gabriele Barlocchi

发明人： Flavio Francesco Villa ,  Gabriele Barlocchi

IPC分类号： H01L2176

CPC分类号： H01L21/76248 ,  H01L21/76208

摘要： A process that includes the steps of forming, in a wafer of monocrystalline silicon, first trenches extending between portions of the wafer; etching the substrate to remove the silicon around the first trenches and forming cavities in the substrate; covering the walls of the cavities with an epitaxial growth inhibiting layer; growing a monocrystalline epitaxial layer on top of the substrate and the cavities so as to obtain a monocrystalline wafer embedding buried cavities completely surrounded by silicon; forming second trenches extending in the epitaxial layer as far as the cavities; removing the epitaxial growth inhibiting layer; oxidizing the cavities, forming at least one continuous region of buried oxide; depositing a polysilicon layer on the entire surface of the wafer and inside the second trenches; removing the polysilicon layer on the surface and leaving filling regions inside the second trenches; and oxidizing, on the top, portions of said filling regions so as to form field oxide regions.

摘要翻译： 一种方法，其包括以下步骤：在单晶硅的晶片中形成在所述晶片的部分之间延伸的第一沟槽; 蚀刻基板以除去第一沟槽周围的硅并在基板中形成空腔; 用外延生长抑制层覆盖空腔的壁; 在衬底和空腔的顶部生长单晶外延层，以便获得完全被硅包围的埋入腔的单晶晶片; 形成在所述外延层中延伸至所述空腔的第二沟槽; 去除外延生长抑制层; 氧化空腔，形成至少一个埋入氧化物的连续区域; 在晶片的整个表面上和第二沟槽内部沉积多晶硅层; 去除表面上的多晶硅层，并使填充区域留在第二沟槽内; 并在顶部氧化所述填充区域的部分，以便形成场氧化物区域。

公开(公告)号：US07524736B2

公开(公告)日：2009-04-28

申请号：US11607802

申请日：2006-12-01

申请人： Giampiero Ottaviani ,  Federico Corni ,  Paolo Ferrari ,  Flavio Francesco Villa

发明人： Giampiero Ottaviani ,  Federico Corni ,  Paolo Ferrari ,  Flavio Francesco Villa

IPC分类号： H01L21/30 ,  C03C15/00

CPC分类号： H01L21/76254

摘要： To manufacture a layer of semiconductor material, a first wafer of semiconductor material is subjected to implantation to form a defect layer at a distance from a first face; the first wafer is bonded to a second wafer, by putting an insulating layer present on the second wafer in contact with the first face of the first wafer. Then, hydrogen atoms are introduced into the first wafer through a second face at an energy such as to avoid defects to be generated in the first wafer and at a temperature lower than 600° C. Thereby, the first wafer splits into a usable layer, bonded to the second wafer, and a remaining layer disposed between the defect layer and the second face of the first wafer. Prior to bonding, the first wafer is subjected to processing steps for obtaining integrated components.

摘要翻译： 为了制造半导体材料层，将半导体材料的第一晶片进行注入以形成距离第一面一定距离的缺陷层; 通过将存在于第二晶片上的绝缘层与第一晶片的第一面接触来将第一晶片接合到第二晶片。 然后，氢原子通过第二面以能量引入第一晶片，以避免在第一晶片中以及在低于600℃的温度下产生缺陷。由此，第一晶片分裂成可用层， 粘合到第二晶片，以及设置在第一晶片的缺陷层和第二面之间的剩余层。 在接合之前，第一晶片经受用于获得集成部件的处理步骤。

公开(公告)号：US07322236B2

公开(公告)日：2008-01-29

申请号：US11338614

申请日：2006-01-24

申请人： Chantal Combi ,  Lorenzo Baldo ,  Dino Faralli ,  Flavio Francesco Villa

发明人： Chantal Combi ,  Lorenzo Baldo ,  Dino Faralli ,  Flavio Francesco Villa

IPC分类号： G01P15/00

CPC分类号： G01P15/123 ,  G01P15/0802 ,  G01P15/18 ,  G01P2015/084

摘要： A manufacturing process of a semiconductor piezoresistive accelerometer includes the steps of: providing a wafer of semiconductor material; providing a membrane in the wafer over a cavity; rigidly coupling an inertial mass to the membrane; and providing, in the wafer, piezoresistive transduction elements, that are sensitive to strains of the membrane and generate corresponding electrical signals. The step of coupling is carried out by forming the inertial mass on top of a surface of the membrane opposite to the cavity. The accelerometer is advantageously used in a device for monitoring the pressure of a tire of a vehicle.

摘要翻译： 半导体压阻加速度计的制造方法包括以下步骤：提供半导体材料的晶片; 在晶片上在腔上提供膜; 将惯性质量刚性耦合到膜上; 并且在晶片中提供对膜的应变敏感的压阻转导元件并产生相应的电信号。 通过在与空腔相对的膜的表面的顶部上形成惯性质量来进行耦合的步骤。 加速度计有利地用于监测车辆的轮胎的压力的装置中。

公开(公告)号：US6153875A

公开(公告)日：2000-11-28

申请号：US85534

申请日：1998-05-27

申请人： Flavio Francesco Villa ,  Benedetto Vigna ,  Paolo Ferrari

发明人： Flavio Francesco Villa ,  Benedetto Vigna ,  Paolo Ferrari

IPC分类号： G01D5/34

CPC分类号： G01D5/34

摘要： An optical two-dimensional position sensor including a selective optical unit which faces, and is displaceable relative to, an integrated device. The selective optical unit is formed by a polarized light source and a filter with four quadrants which permits passage of light through two quadrants only. The selective optical unit is attached to a control lever such as to translate in a plane along a first direction and a second direction, and to pivot around an axis which is orthogonal to the preceding directions. In a transparent package, the integrated device comprises a first group of sensor elements which are spaced along the first direction, a second group of sensor elements which are spaced along the second direction and a third group of sensor elements which detect an angular position of the selective optical unit. Electronics which are integrated with the sensor elements generates a code which is associated with each position which is assumed by the selective optical unit and a control signal which corresponds to a function to be performed.

摘要翻译： 一种光学二维位置传感器，包括面向并可相对于集成装置移位的选择性光学单元。 选择性光学单元由偏振光源和具有四个象限的滤光片形成，其允许光仅通过两个象限。 选择性光学单元附接到控制杆，例如沿着第一方向和第二方向在平面中平移，并且围绕与前述方向正交的轴线枢转。 在透明封装中，集成器件包括沿着第一方向间隔开的第一组传感器元件，沿着第二方向间隔开的第二组传感器元件，以及第三组传感器元件，其检测 选择光学单元。 与传感器元件集成的电子产生与由选择性光学单元所假设的每个位置相关联的代码和对应于要执行的功能的控制信号。