INTEGRATED CIRCUIT TESTING
    31.
    发明申请
    INTEGRATED CIRCUIT TESTING 审中-公开
    集成电路测试

    公开(公告)号:US20160003904A1

    公开(公告)日:2016-01-07

    申请号:US14827983

    申请日:2015-08-17

    Applicant: RAMBUS INC.

    Inventor: Adrian E. Ong

    Abstract: Systems and methods of testing integrated circuits are disclosed. A system may include a data compression component to compress data received from an integrated circuit under test at a first clock frequency, to generate compressed data. The system may also include a data output component, operatively coupled to the data compression component, to convey the compressed data to automated testing equipment at a second clock frequency.

    Abstract translation: 公开了测试集成电路的系统和方法。 系统可以包括数据压缩组件,以在第一时钟频率上压缩从被测集成电路接收的数据,以产生压缩数据。 系统还可以包括可操作地耦合到数据压缩部件的数据输出部件,以便以第二时钟频率将压缩数据传送到自动测试设备。

    Programmable memory repair scheme
    32.
    发明授权
    Programmable memory repair scheme 有权
    可编程内存修复方案

    公开(公告)号:US09129712B2

    公开(公告)日:2015-09-08

    申请号:US14150659

    申请日:2014-01-08

    Applicant: RAMBUS INC.

    Abstract: A controller including a non-volatile memory to store a repair address, and a memory control unit operatively coupled with the non-volatile memory. The memory control unit comprising a memory test function configured to detect a malfunctioning address of primary data storage elements within a memory device. The memory device being another semiconductor device separate from the controller. The memory test function configured to store the repair address in the non-volatile memory, the repair address indicating the malfunctioning address of the primary data storage element.

    Abstract translation: 一种包括用于存储修复地址的非易失性存储器的控制器,以及与非易失性存储器可操作地耦合的存储器控​​制单元。 存储器控制单元包括存储器测试功能,其被配置为检测存储器设备内主要数据存储元件的故障地址。 存储器件是与控制器分开的另一个半导体器件。 所述存储器测试功能被配置为将所述修复地址存储在所述非易失性存储器中,所述修复地址指示所述主数据存储元件的故障地址。

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