公开(公告)号：US20210104635A1

公开(公告)日：2021-04-08

申请号：US17125532

申请日：2020-12-17

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki SHIMBO

IPC: H01L29/786 ,  H01L27/092 ,  B82Y10/00 ,  H01L27/02 ,  H01L29/06 ,  H01L27/118 ,  H01L29/423

Abstract: In a standard cell including nanowire FETs, pads connected to nanowires are arranged at a predetermined pitch in X direction along which the nanowires extend. A cell width of the standard cell is an integral multiplication of the pitch. In a case where the standard cell is arranged to constitute the layout of a semiconductor integrated circuit device, the pads are regularly arranged in the X direction.

公开(公告)号：US20210104552A1

公开(公告)日：2021-04-08

申请号：US17104563

申请日：2020-11-25

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki SHIMBO

IPC: H01L27/118 ,  H01L27/02 ,  H01L27/092 ,  H01L29/06

Abstract: Provided is a semiconductor integrated circuit device including a nanowire field effect transistor (FET) and having a layout configuration effective for making manufacturing the device easy. A standard cell having no logical function is disposed adjacent to a standard cell having a logical function. The standard cell includes nanowire FETs having nanowires and pads. The standard cell further includes dummy pads, which have no contribution to a logical function of a circuit.

公开(公告)号：US20200303562A1

公开(公告)日：2020-09-24

申请号：US16893167

申请日：2020-06-04

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki SHIMBO

IPC: H01L29/786 ,  H01L27/092 ,  B82Y10/00 ,  H01L27/02 ,  H01L29/06 ,  H01L27/118 ,  H01L29/423

Abstract: In a standard cell including nanowire FETs, pads connected to nanowires are arranged at a predetermined pitch in X direction along which the nanowires extend. A cell width of the standard cell is an integral multiplication of the pitch. In a case where the standard cell is arranged to constitute the layout of a semiconductor integrated circuit device, the pads are regularly arranged in the X direction.

公开(公告)号：US20200235099A1

公开(公告)日：2020-07-23

申请号：US16842599

申请日：2020-04-07

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki SHIMBO

IPC: H01L27/092 ,  H01L27/02 ,  H01L27/06 ,  H01L27/088 ,  H01L29/66

Abstract: Disclosed herein is a semiconductor device including two standard cells which are arranged adjacent to each other in an X direction. One of the two standard cells includes a plurality of first fins which extend in the X direction, and which are arranged along a boundary between the two standard cells in a Y direction. The other standard cell includes a plurality of second fins which extend in the X direction, and which are arranged along the boundary between the two standard cells in the Y direction. The plurality of second fins includes a dummy fin.

公开(公告)号：US20170250197A1

公开(公告)日：2017-08-31

申请号：US15592877

申请日：2017-05-11

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki SHIMBO

IPC: H01L27/12 ,  H01L27/06 ,  H01L27/02 ,  H01L23/66 ,  H01L23/528

CPC classification number: H01L27/1203 ,  H01L21/84 ,  H01L23/528 ,  H01L23/5286 ,  H01L23/66 ,  H01L27/0207 ,  H01L27/0629 ,  H01L27/11807 ,  H01L29/94 ,  H01L2223/6677

Abstract: In a circuit block, a plurality of standard cells are arranged to form a circuit of silicon-on-insulator (SOI) transistors. Also arranged in the circuit block is a capacitor cell including a capacitor arranged between a power supply line for supplying VDD and a power supply line for supplying VSS. An antenna cell, including an antenna diode formed between either of the two power supply lines and either a substrate or a well, is arranged adjacent to the capacitor cell.

公开(公告)号：US20160190138A1

公开(公告)日：2016-06-30

申请号：US15059974

申请日：2016-03-03

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki SHIMBO

IPC: H01L27/092 ,  H01L27/06 ,  H01L27/088 ,  H01L27/02

CPC classification number: H01L27/0924 ,  H01L27/0207 ,  H01L27/0629 ,  H01L27/0676 ,  H01L27/0886 ,  H01L29/6681

Abstract: Disclosed herein is a semiconductor device including two standard cells which are arranged adjacent to each other in an X direction. One of the two standard cells includes a plurality of first fins which extend in the X direction, and which are arranged along a boundary between the two standard cells in a Y direction. The other standard cell includes a plurality of second fins which extend in the X direction, and which are arranged along the boundary between the two standard cells in the Y direction. The plurality of second fins includes a dummy fin.

Abstract translation: 这里公开了包括在X方向上彼此相邻布置的两个标准单元的半导体器件。 两个标准单元中的一个包括沿X方向延伸的多个第一翅片，并且沿着Y方向沿两个标准单元之间的边界布置。 另一个标准单元包括在X方向上延伸的沿着Y方向在两个标准单元之间的边界排列的多个第二散热片。 多个第二散热片包括虚拟散热片。