EFFICIENT PITCH MULTIPLICATION PROCESS
    31.
    发明申请
    EFFICIENT PITCH MULTIPLICATION PROCESS 有权
    有效的PITCH MULTIPLICATION PROCESS

    公开(公告)号:US20100112489A1

    公开(公告)日:2010-05-06

    申请号:US12687005

    申请日:2010-01-13

    IPC分类号: G03F7/20 H05K3/00

    摘要: Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist layer which simultaneously defines mask elements corresponding to features in the array, interface and periphery areas of the integrated circuit. The pattern is transferred to an amorphous carbon layer. Sidewall spacers are formed on the sidewalls of the patterned amorphous carbon layer. A layer of protective material is deposited and then patterned to expose mask elements in the array region and in selected parts of the interface or periphery areas. Amorphous carbon in the array region or other exposed parts is removed, thereby leaving a pattern including free-standing, pitch multiplied spacers in the array region. The protective material is removed, leaving a pattern of pitch multiplied spacers in the array region and non-pitch multiplied mask elements in the interface and periphery areas. The pattern is transferred to a hard mask layer, through which an underlying substrate is etched.

    摘要翻译: 通过通过掩模处理衬底来形成集成电路的间距倍增和非间距倍数特征,例如集成电路的阵列,接口和外围区域中的特征。 通过图案化光刻胶层来形成掩模,该光致抗蚀剂层同时限定对应于集成电路的阵列,界面和外围区域中的特征的掩模元件。 将图案转移到无定形碳层。 侧壁间隔物形成在图案化无定形碳层的侧壁上。 沉积一层保护材料,然后将其图案化以暴露阵列区域中的掩模元件和界面或外围区域的选定部分。 除去阵列区域或其它暴露部分中的无定形碳,从而在阵列区域中留下包括独立的,间距倍增的间隔物的图案。 去除保护材料,在阵列区域中留下间距倍数间隔物的图案,并在界面和外围区域留下非间距倍增的掩模元件。 将图案转移到硬掩模层,通过该硬掩模层蚀刻下面的基底。

    Metal nanoparticle photonic bandgap device in SOI method
    32.
    发明授权
    Metal nanoparticle photonic bandgap device in SOI method 有权
    SOI方法中的金属纳米粒子光子带隙器件

    公开(公告)号:US07459324B1

    公开(公告)日:2008-12-02

    申请号:US11844192

    申请日:2007-08-23

    IPC分类号: H01L21/20

    摘要: A Metal Nanoparticle Photonic Bandgap Device in SOI Method (NC#098884). The method includes providing a substrate having a semiconductor layer over an insulator layer, operatively coupling the substrate to a photonic bandgap structure having at least one period, wherein the photonic bandgap structure is adapted to receive and output light along a predetermined path, and operatively coupling the photonic bandgap structure and the substrate to a metal nanoparticle structure comprising at least three metal nanoparticles having spherical shapes of different radii, wherein the at least three metal nanoparticles are adapted to receive and amplify light rays and output amplified light.

    摘要翻译: SOI方法中的金属纳米粒子光子带隙器件(NC#098884)。 该方法包括提供在绝缘体层上方具有半导体层的衬底,可操作地将衬底耦合到具有至少一个周期的光子带隙结构,其中光子带隙结构适于沿着预定路径接收和输出光,以及可操作耦合 所述光子带隙结构和所述衬底至金属纳米颗粒结构,其包括具有不同半径的球形形状的至少三种金属纳米颗粒,其中所述至少三种金属纳米颗粒适于接收和放大光线并输出放大的光。

    Efficient pitch multiplication process
    33.
    发明申请
    Efficient pitch multiplication process 有权
    高效的音调乘法过程

    公开(公告)号:US20080070165A1

    公开(公告)日:2008-03-20

    申请号:US11521851

    申请日:2006-09-14

    IPC分类号: G03F7/26

    摘要: Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist layer which simultaneously defines mask elements corresponding to features in the array, interface and periphery areas of the integrated circuit. The pattern is transferred to an amorphous carbon layer. Sidewall spacers are formed on the sidewalls of the patterned amorphous carbon layer. A layer of protective material is deposited and then patterned to expose mask elements in the array region and in selected parts of the interface or periphery areas. Amorphous carbon in the array region or other exposed parts is removed, thereby leaving a pattern including free-standing, pitch multiplied spacers in the array region. The protective material is removed, leaving a pattern of pitch multiplied spacers in the array region and non-pitch multiplied mask elements in the interface and periphery areas. The pattern is transferred to a hard mask layer, through which an underlying substrate is etched.

    摘要翻译: 通过通过掩模处理衬底来形成集成电路的间距倍增和非间距倍数特征,例如集成电路的阵列,接口和外围区域中的特征。 通过图案化光刻胶层来形成掩模,该光致抗蚀剂层同时限定对应于集成电路的阵列,界面和外围区域中的特征的掩模元件。 将图案转移到无定形碳层。 侧壁间隔物形成在图案化无定形碳层的侧壁上。 沉积一层保护材料,然后将其图案化以暴露阵列区域中的掩模元件和界面或外围区域的选定部分。 除去阵列区域或其它暴露部分中的无定形碳,从而在阵列区域中留下包括独立的,间距倍增的间隔物的图案。 去除保护材料,在阵列区域中留下间距倍数间隔物的图案,并在界面和外围区域留下非间距倍增的掩模元件。 将图案转移到硬掩模层,通过该硬掩模层蚀刻下面的基底。

    Methods for forming conductive vias in a substrate and electronic devices and systems including an at least partially reversed oxidation injury at an interface between a conductive via and a conductive interconnect structure
    35.
    发明申请
    Methods for forming conductive vias in a substrate and electronic devices and systems including an at least partially reversed oxidation injury at an interface between a conductive via and a conductive interconnect structure 审中-公开
    在衬底中形成导电通孔的方法以及在导电通孔和导电互连结构之间的界面处包括至少部分反转的氧化损伤的电子器件和系统

    公开(公告)号:US20070007657A1

    公开(公告)日:2007-01-11

    申请号:US11516096

    申请日:2006-09-05

    IPC分类号: H01L23/52 H01L21/4763

    摘要: Methods for forming conductive vias in a substrate include oxidizing at least a portion of a metallic structure that is exposed through an opening in a substrate to form an oxidation injury in the metallic structure. The oxidation injury is at least partially reversed, and conductive material is provided within the opening in the substrate. Electronic devices and systems include at least one conductive via extending through a substrate and contacting at least one conductive interconnect structure along an interface. The conductive interconnect structure includes an at least partially reversed oxidation injury at the interface between the conductive via and the interconnect structure.

    摘要翻译: 在衬底中形成导电通孔的方法包括氧化至少一部分通过衬底中的开口暴露的金属结构,以在金属结构中形成氧化损伤。 氧化损伤至少部分反转,导电材料设置在基板的开口内。 电子设备和系统包括至少一个延伸穿过衬底并且沿着界面接触至少一个导电互连结构的导电通孔。 导电互连结构包括在导电通孔和互连结构之间的界面处的至少部分反转的氧化损伤。

    Feed-customized processing of multiple video streams in a pipeline architecture
    36.
    发明申请
    Feed-customized processing of multiple video streams in a pipeline architecture 有权
    在流水线架构中对多个视频流进行自定义处理

    公开(公告)号:US20060062430A1

    公开(公告)日:2006-03-23

    申请号:US10964977

    申请日:2004-10-13

    IPC分类号: G06K9/00 G06F7/38 G06K9/60

    摘要: A pipeline architecture for analyzing multiple streams of video is embodied, in part, in a layer of application program interfaces (APIs) to each stage of processing. Buffer queuing is used between some stages, which helps moderate the load on the CPU(s). Through the layer of APIs, innumerable video analysis applications can access and analyze video data flowing through the pipeline, and can annotate portions of the video data (e.g., frames and groups of frames), based on the analyses performed, with information that describes the frame or group. These annotated frames and groups flow through the pipeline to subsequent stages of processing, at which increasingly complex analyses can be performed. At each stage, portions of the video data that are of little or no interest are removed from the video data. Ultimately, “events” are constructed and stored in a database, from which cross-event and historical analyses may be performed and associations with, and among, events may be made.

    摘要翻译: 用于分析多个视频流的流水线架构部分地体现在每个处理阶段的应用程序接口(API)层中。 在一些阶段之间使用缓冲区排队,这有助于缓和CPU上的负载。 通过API层,无数视频分析应用程序可以访问和分析流经流水线的视频数据,并且可以基于所执行的分析来注释视频数据的一部分(例如,帧和帧组),其中描述 框架或组。 这些注释的帧和组流经管线到处理的后续阶段,在该阶段可以执行越来越复杂的分析。 在每个阶段,从视频数据中删除少量或不感兴趣的视频数据的部分。 最终,“事件”被构建并存储在数据库中,可以从该数据库中进行交叉事件和历史分析,并且可以进行与事件的关联以及事件之间的关联。

    Methods for improving metal-to-metal contact in a via, devices made according to the methods, and systems including the same
    38.
    发明申请
    Methods for improving metal-to-metal contact in a via, devices made according to the methods, and systems including the same 有权
    用于改善通孔中金属对金属接触的方法,根据方法制备的器件以及包括其的系统

    公开(公告)号:US20050170642A1

    公开(公告)日:2005-08-04

    申请号:US10767764

    申请日:2004-01-29

    IPC分类号: H01L21/44 H01L21/768

    摘要: In damascene process integration, a reducing plasma is applied after the etch stop or barrier layer is opened over a copper layer. Currently known methods for opening barrier layers suffer from the disadvantage that they cause at least some of the underlying copper to oxidize to copper oxide.. Because copper oxide is selectively removed by subsequent wet cleaning, voids can form where damaged copper (e.g., copper oxide) is removed, thus compromising the reliability of metal-to-metal contact in vias. The present invention advantageously overcomes this and other disadvantages of the prior art through the use of a hydrogen plasma following the barrier layer opening step, which repairs damaged copper (e.g., reduces copper oxide to copper), thus preventing and/or diminishing defects in metal-to-metal contacts in vias and concomitantly improving the reliability of the same.

    摘要翻译: 在镶嵌工艺集成中,在蚀刻停止或阻挡层在铜层上打开之后施加还原等离子体。 目前已知的用于打开阻挡层的方法的缺点在于它们使至少一些下面的铜氧化成氧化铜。由于通过随后的湿法清洁选择性地除去氧化铜,所以在损坏的铜(例如,氧化铜 ),因此损害了通孔中金属对金属接触的可靠性。 本发明有利地通过在阻挡层开口步骤之后使用氢等离子体来克服现有技术的这个和其他缺点,其修复损坏的铜(例如,将铜氧化物还原为铜),从而防止和/或减少金属中的缺陷 金属触点,同时提高了其可靠性。

    Complementary plasmonic device and method

    公开(公告)号:US10222550B2

    公开(公告)日:2019-03-05

    申请号:US15969944

    申请日:2018-05-03

    IPC分类号: G02B6/124 G02B6/122 G02B6/12

    摘要: Methods and devices for a plasmonic circuit are described. A planar plasmonic device is configured with a controlling gate structure and when coupled to a complementary plasmonic device, a switching circuit can be realized. Also, by varying the properties of the complementary plasmonic device, the circuit can also operate as an amplifier. By use of combinations of this plasmonic circuit element, more advanced circuits and logic functions can be arrived at.

    Multimedia editing systems and methods therefor
    40.
    发明授权
    Multimedia editing systems and methods therefor 有权
    多媒体编辑系统及其方法

    公开(公告)号:US08463845B2

    公开(公告)日:2013-06-11

    申请号:US12750171

    申请日:2010-03-30

    IPC分类号: G06F15/173

    CPC分类号: G11B27/034

    摘要: A distributed system and methods for web-based multimedia content including a global media hub (GMH) server computer (500) and a multiplicity of remote media asset node (MAN) server computers (510, 520, 530, 540, 550) and client computer terminals (515, 525, 535, 536, 537, 545, 555), with the client or customer computers being constructed and configured for network-based coupling to at least one of the MAN server computers for editing a browse copy of the MMC stored at the MAN. The GMH server computer includes processing component, memory for storage of all the metadata, and includes software operable thereon for orchestrating the processes that act on the MMC and metadata, including the operations and actions that are initiated by the client computer terminals for acting on the MAN-based MMC.

    摘要翻译: 一种用于基于web的多媒体内容的分布式系统和方法,包括全球媒体集线器(GMH)服务器计算机(500)和多个远程媒体资产节点(MAN)服务器计算机(510,520,530,540,550)和客户机 计算机终端(515,525,535,536,537,545,555),其中客户端或客户计算机被构造和配置用于基于网络耦合到至少一个MAN服务器计算机,用于编辑MMC的浏览副本 存储在MAN。 GMH服务器计算机包括处理组件,用于存储所有元数据的存储器,并且包括可在其上操作的用于协调对MMC和元数据进行操作的过程的软件,包括由客户端计算机终端发起的操作和动作, 基于MAN的MMC。