-
公开(公告)号：US10366471B2
公开(公告)日：2019-07-30
申请号：US15349609
申请日：2016-11-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Shashank Dabral , Mihir Narendra Mody , Denis Beaudoin , Niraj Nandan , Gang Hua
Abstract: A method of de-mosaicing pixel data from an image processor includes generating a pixel block that includes a plurality of image pixels. The method also includes determining a first image gradient between a first set of pixels of the pixel block and a second image gradient between a second set of pixels of the pixel block. The method also includes determining a first adaptive threshold value based on intensity of a third set of pixels of the pixel block. The pixels of the third set of pixels are adjacent to one another. The method also includes filtering the pixel block in a vertical, horizontal, or neutral direction based on the first and second image gradients and the first adaptive threshold value utilizing a plurality of FIR filters to generate a plurality of component images.
-
公开(公告)号：US20190096077A1
公开(公告)日：2019-03-28
申请号：US15879281
申请日：2018-01-24
Applicant: Texas Instruments Incorporated
Inventor： Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: An apparatus and method for geometrically correcting an arbitrary shaped input frame and generating an undistorted output frame. The method includes capturing arbitrary shaped input images with multiple optical devices and processing the images, identifying redundant blocks and valid blocks in each of the images, allocating an output frame with an output frame size and dividing the output frame into regions shaped as a rectangle, programming the apparatus and disabling processing for invalid blocks in each of the regions, fetching data corresponding to each of the valid blocks and storing in an internal memory, interpolating data for each of the regions with stitching and composing the valid blocks for the output frame and displaying the output frame on a display module.
-
公开(公告)号：US20190096042A1
公开(公告)日：2019-03-28
申请号：US15927820
申请日：2018-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.
-
公开(公告)号：US20180373678A1
公开(公告)日：2018-12-27
申请号：US16057667
申请日：2018-08-07
Applicant: Texas Instruments Incorporated
Inventor： Arthur John Redfern , Donald Edward Steiss , Mihir Narendra Mody , Tarek Aziz Lahlou
Abstract: An outer product multiplier (GPM) system/method that integrates compute gating and input/output circular column rotation functions to balance time spent in compute and data transfer operations while limiting overall dynamic power dissipation is disclosed. Matrix compute gating (MCG) based on a computation decision matrix (CDM) limits the number of computations required on a per cycle basis to reduce overall matrix compute cycle power dissipation. A circular column rotation vector (CRV) automates input/output data formatting to reduce the number of data transfer operations required to achieve a given matrix computation result. Matrix function operators (MFO) utilizing these features are disclosed and include: matrix-matrix multiplication; matrix-matrix and vector-vector point-wise multiplication, addition, and assignment; matrix-vector multiplication; vector-vector inner product; matrix transpose; matrix row permute; and vector-column permute.
-
公开(公告)号：US10121231B2
公开(公告)日：2018-11-06
申请号：US15183459
申请日：2016-06-15
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra Mody , Shashank Dabral , Jesse Gregory Villarreal, Jr. , William Wallace , Niraj Nandan
Abstract: A method for filtering noise for imaging includes receiving an image frame having position and range data. A filter size divides the frame into filter windows for processing each of the filter windows. For the first pixel, a space to the center pixel and a range difference between this pixel and the center pixel is determined and used for choosing a selected weight from weights in a 2D weight LUT including weighting for space and range difference, a filtered range value is calculated by applying the selected 2D weight to the pixel, and the range, filtered range value and selected 2D weight are summed. The determining, choosing, calculating and summing are repeated for at least the second pixel. A total sum of contributions from the first and second pixel are divided by the sum of selected 2D weights to generate a final filtered range value for the center pixel.
-
Patent Agency Ranking
公开(公告)号：US10083374B2
公开(公告)日：2018-09-25
申请号：US15376473
申请日：2016-12-12
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra Mody , Manu Mathew , Chaitanya Satish Ghone
CPC classification number: G06K9/4628 , G06K9/522 , G06K9/6271
Abstract: A method for analyzing images to generate a plurality of output features includes receiving input features of the image and performing Fourier transforms on each input feature. Kernels having coefficients of a plurality of trained features are received and on-the-fly Fourier transforms (OTF-FTs) are performed on the coefficients in the kernels. The output of each Fourier transform and each OTF-FT are multiplied together to generate a plurality of products and each of the products are added to produce one sum for each output feature. Two-dimensional inverse Fourier transforms are performed on each sum.
-
公开(公告)号：US09871965B2
公开(公告)日：2018-01-16
申请号：US15183495
申请日：2016-06-15
Applicant: Texas Instruments Incorporated
Inventor： Shashank Dabral , Mihir Narendra Mody , Gang Hua , Anthony Lell , Niraj Nandan , Rajashekhar Allu
CPC classification number: H04N5/23232 , G06T5/008 , G06T2207/20208 , H04N5/2353 , H04N5/2355 , H04N5/2356 , H04N5/265 , H04N5/35572 , H04N5/3675 , H04N9/045 , H04N2201/0084
Abstract: A signal processing chain implements wide dynamic range (WDR) multi-frame processing including receiving raw image signals from a WDR sensor including a plurality of frames including a first frame including first exposure time pixel data and a second frame including second exposure time pixel data. Statistics for camera control are generated including first statistics for the first pixel data and second statistics for the second pixel data. The first and second pixel data are merged using WDR merge algorithm in a WDR merge block which utilizes the first and second statistics to generate a raw higher bit width single frame image. The single frame image is post-processed in post-processing block using at least a defect pixel correction algorithm, and at least a portion of tone mapping is performed on the single frame image after the post-processing to provide an output toned mapped image.
-
公开(公告)号：US09826240B2
公开(公告)日：2017-11-21
申请号：US14320712
申请日：2014-07-01
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra Mody , Hrushikesh Tukaram Garud , Soyeb Nagori
IPC: H04N19/117 , H04N19/119 , H04N19/89 , H04N19/44 , H04N19/80 , H04N19/132 , H04N19/176 , H04N19/14 , H04N19/82
CPC classification number: H04N19/176 , H04N19/117 , H04N19/119 , H04N19/132 , H04N19/14 , H04N19/82
Abstract: An apparatus for sample adaptive offset (SAO) filtering in video encoding. A unified processing engine collects statistics on a block of pixels, determines a minimum RD cost (J) for each category of band offsets and edge offsets; determines a RD cost to find the optimal SAO type and determines a cost for each of the left SAO parameters and the up SAO parameters. The unified processing engine operates for three iterations: once for luminance once for each chrominance. A SAO merge decision unit determines an optimal mode and generates current LCU Parameters. The RD offset unit determination includes determining whether the sign of the minimum offset is proper for the category of edge offset. The RD offset is determined using a programmable look-up table indexed by the offset to estimate a rate. The unified processing engine operates on a three stage pipeline: loading blocks; processing; and updating blocks.
-
公开(公告)号：US09628787B2
公开(公告)日：2017-04-18
申请号：US14607053
申请日：2015-01-27
Applicant: Texas Instruments Incorporated
Inventor： Rahul Gulati , Vasant Easwaran , Mihir Narendra Mody , Prashant Dinkar Karandikar , Prithvi Y. A. Shankar , Aishwarya Dubey , Kedar Chitnis , Rajat Sagar
CPC classification number: H04N17/002 , G06T7/0002 , G06T2207/30168 , G06T2207/30252
Abstract: A method for testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC, receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions, performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly.
-
公开(公告)号：US20130272429A1
公开(公告)日：2013-10-17
申请号：US13864131
申请日：2013-04-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
IPC: H04N7/26
CPC classification number: H04N19/186 , H04N19/44
Abstract: Checksum computation for video coding is provided that breaks the dependency between the color components of a picture in the prior art. More specifically, rather than computing a single checksum for a picture as in the prior art, a separate checksum is computed for each color component. Computing a separate checksum for each color component enables parallel computation of the component checksums. Methods are provided for computing three separate checksums after a picture is decoded. Methods are also provided for computing three separate checksums on a largest coding unit basis, thus allowing the checksums for a picture to be computed as the picture is being decoded.
Abstract translation: 提供了用于视频编码的校验和计算，其破坏了现有技术中的图像的颜色分量之间的依赖关系。 更具体地说，与现有技术相比，不是计算图像的单个校验和，而是为每个颜色分量计算单独的校验和。 为每个颜色组件计算单独的校验和，可以并行计算组件校验和。 提供了在解码图片之后计算三个单独的校验和的方法。 还提供了用于在最大编码单元的基础上计算三个单独的校验和的方法，从而允许当图像被解码时计算图像的校验和。
-
-
-
-
-
-
-
-
-
Search Results
235
records
(took 0.034 seconds)
