公开(公告)号：US4900257A

公开(公告)日：1990-02-13

申请号：US181392

申请日：1988-04-14

Applicant: Takeo Maeda

Inventor： Takeo Maeda

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/336 ,  H01L29/43 ,  H01L29/45

CPC classification number: H01L29/456 ,  Y10S148/015 ,  Y10S148/017 ,  Y10S148/147 ,  Y10S438/914 ,  Y10S438/976

Abstract: A semiconductor device has a multilayer comprising a refractory metal silicide and a metal nitride on a silicon layer. The metal nitride prevents the silicon layer from being oxidized so that a good ohmic contact is obtained. A method of manufacturing the semniconductor device comprises steps of forming a polysilicon layer, implanting impurity ions into the polysilicon, removing a self oxidation film from the polysilicon layer, sequentially forming refractory metal and its nitride, patterning, and silicifying the metal. The method provides a semiconductor device having a good ohmic contact, a reduced resistivity of interconnections and high reliability.

Abstract translation: 半导体器件具有在硅层上包含难熔金属硅化物和金属氮化物的多层。 金属氮化物防止硅层氧化，从而获得良好的欧姆接触。 制造半导体器件的方法包括以下步骤：形成多晶硅层，将杂质离子注入到多晶硅中，从多晶硅层去除自氧化膜，顺序地形成难熔金属及其氮化物，图案化和硅化硅化物。 该方法提供了具有良好欧姆接触，降低的互连电阻和高可靠性的半导体器件。

公开(公告)号：US4769337A

公开(公告)日：1988-09-06

申请号：US47146

申请日：1987-05-08

Applicant: Takeo Maeda

Inventor： Takeo Maeda

IPC: H01L21/285 ,  H01L21/336 ,  H01L21/265 ,  H01L21/22

CPC classification number: H01L29/66575 ,  H01L21/28525 ,  H01L2924/0002 ,  Y10S148/14

Abstract: A method of manufacturing a semiconductor device, comprises the process of forming first and second well regions, which are of N-type and P-type, respectively, in a silicon body, forming a base layer of P-type in the first well region, forming an emitter layer of N-type in the base layer, forming source and drain layers of N-type in the second well region, forming a polysilicon emitter electrode on the emitter layer, and ion-implanting impurities of N-type into an interface between the emitter layer and the emitter electrode, so as to break down an insulative layer at the interface.

Abstract translation: 一种制造半导体器件的方法包括在硅体中分别形成N型和P型的第一和第二阱区的工艺，在第一阱区中形成P型的基极层 在基极层中形成N型发射极层，在第二阱区中形成N型源极和漏极层，在发射极层上形成多晶硅发射电极，并将N型离子注入杂质 在发射极层和发射极之间的界面，以便在界面处分解绝缘层。

公开(公告)号：US4663825A

公开(公告)日：1987-05-12

申请号：US780071

申请日：1985-09-25

Applicant: Takeo Maeda

Inventor： Takeo Maeda

IPC: H01L21/285 ,  H01L21/336 ,  H01L21/265

CPC classification number: H01L29/66575 ,  H01L21/28525 ,  H01L2924/0002 ,  Y10S148/14

Abstract: A method of manufacturing a semiconductor device comprises the steps of forming a gate electrode on a silicon substrate of a p-conductivity type and source and in the drain regions of an n-conductivity type substrate so as to interpose the gate electrode therebetween; depositing silicon on the source and drain regions to form a polysilicon wiring layer; and ion-implanting an impurity to an interface between the source and drain regions and the polysilicon wiring layer at acceleration voltage of 40 keV and a dose of 5.times.10.sup.15 cm.sup.-2 to mechanically break down an oxide film formed at said interface.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：在p导电类型的硅衬底上形成栅电极，并在n导电型衬底的漏极区域中形成栅电极，以将栅电极插入其间; 在源极和漏极区上沉积硅以形成多晶硅布线层; 并且在40keV的加速电压和5×10 15 cm -2的剂量下将杂质离子注入到源极和漏极区域和多晶硅布线层之间的界面上，以机械地分解形成在所述界面处的氧化膜。

公开(公告)号：US4643777A

公开(公告)日：1987-02-17

申请号：US683479

申请日：1984-12-19

Applicant: Takeo Maeda

Inventor： Takeo Maeda

IPC: H01L21/3205 ,  H01L21/02 ,  H01L23/52 ,  H01L21/283

CPC classification number: H01L28/24 ,  Y10S148/035 ,  Y10S148/105 ,  Y10S148/147

Abstract: There is disclosed a method of manufacturing a semiconductor device comprising the steps of forming a polysilicon film on a semiconductor substrate through an oxidation film, forming a mask of a predetermined pattern on the polysilicon film, forming a molybdenum film on the polysilicon film, and silicifying those regions of said molybdenum film not covered by the mask so that a structure of the uncovered molybdenum film regions and those regions of the polysilicon film located under the uncovered molybdenum regions have low resistance, while a region of the molybdenum film covered by the mask has high resistance.

Abstract translation: 公开了一种制造半导体器件的方法，包括以下步骤：通过氧化膜在半导体衬底上形成多晶硅膜，在多晶硅膜上形成预定图案的掩模，在多晶硅膜上形成钼膜，并将硅化物 所述钼膜的未被掩模覆盖的那些区域，使得未覆盖的钼膜区域的结构和位于未覆盖的钼区域下方的多晶硅膜的那些区域具有低电阻，而由掩模覆盖的钼膜的区域具有 高电阻。

公开(公告)号：US4540500A

公开(公告)日：1985-09-10

申请号：US557136

申请日：1983-10-20

Applicant: Michihiro Torii ,  Tomoyoshi Kosaka ,  Takeo Maeda ,  Hiroshi Rikukawa

Inventor： Michihiro Torii ,  Tomoyoshi Kosaka ,  Takeo Maeda ,  Hiroshi Rikukawa

IPC: C01G49/00 ,  C04B35/26 ,  C04B35/64 ,  H01F1/10 ,  H01F1/34 ,  H01F1/37

CPC classification number: H01F1/37 ,  C04B35/2616 ,  C04B35/2625 ,  C04B35/265 ,  C04B35/64

Abstract: A low temperature sinterable oxide magnetic material prepared by adding 0.1 to 5% by weight of glass containing 3 to 50 mol % of Li.sub.2 O, 10 to 97 mol % of B.sub.2 O.sub.3 and 0 to 70 mol % of SiO.sub.2 to ferrite containing at least 0.5 mol % of Li.sub.2 O. Especially, when a glass containing 10-28 mol % of Li.sub.2 O, 34 to 66 mol % of B.sub.2 O.sub.3, and 15 to 45 mol % of SiO.sub.2 is used, the sintering temperature can be reduced to about 1,000.degree. C. or less.

Abstract translation: PCT No.PCT / JP83 / 00055 Sec。 371日期：1983年10月20日 102（e）1983年10月23日日期PCT提交1983年2月23日PCT公布。 公开号WO83 / 03094 日本1983年9月15日。一种低温可烧结氧化物磁性材料，其通过将含有3〜50摩尔％的Li 2 O，10〜97摩尔％的B 2 O 3和0〜70摩尔％的SiO 2的玻璃添加0.1〜5重量％ 含有至少0.5mol％Li 2 O的铁素体。 特别是使用含有10〜28摩尔％的Li 2 O，34〜66摩尔％的B 2 O 3和15〜45摩尔％的SiO 2的玻璃时，可以将烧结温度降低至约1000℃以下。

公开(公告)号：US4336475A

公开(公告)日：1982-06-22

申请号：US66767

申请日：1979-08-14

Applicant: Shigeki Morinaga ,  Kunio Miyashita ,  Tadashi Takahashi ,  Takeo Maeda ,  Seizi Yamashita

Inventor： Shigeki Morinaga ,  Kunio Miyashita ,  Tadashi Takahashi ,  Takeo Maeda ,  Seizi Yamashita

IPC: H02K3/00 ,  H02K3/46 ,  H02K29/00

CPC classification number: H02K21/24 ,  H02K3/00

Abstract: The present invention relates to a slotless, brushless motor comprising a permanent magnet rotor rotationary together with a shaft and a stationary armature coil disposed in opposition to the rotor.The armature coil comprises a coil portion concentrically wound, an adjacent coil portion formed in sequence from the coil portion and concentrically wound, a coil performed on a plane by a plurality of the coil portions, N coils (N is integer) laid on each other and different in a phase respectively, sheets disposed between said N coils and a supporting member supporting the coils and the sheets made integral.

Abstract translation: 本发明涉及一种无槽无刷电动机，其包括与轴一起旋转的永磁体转子和与转子相对设置的固定电枢线圈。 电枢线圈包括同心缠绕的线圈部分，从线圈部分顺序形成并同心缠绕的相邻线圈部分，由多个线圈部分在平面上执行的线圈，彼此相邻的N个线圈（N是整数） 并且分别具有不同的相位，设置在所述N个线圈之间的片材和支撑所述线圈的支撑部件和一体化的片材。