HIGH ELECTRON MOBILITY TRANSISTOR AND FABRICATING METHOD OF THE SAME

    公开(公告)号:US20230112917A1

    公开(公告)日:2023-04-13

    申请号:US17515541

    申请日:2021-10-31

    Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.

    Semiconductor structure and method for forming the same

    公开(公告)号:US12274081B2

    公开(公告)日:2025-04-08

    申请号:US18519099

    申请日:2023-11-27

    Abstract: A method for forming a semiconductor structure includes the steps of forming a stacked structure on a substrate, forming an insulating layer on the stacked structure, forming a passivation layer on the insulating layer, performing an etching process to form an opening through the passivation layer and the insulating layer to expose a portion of the stacked structure and an extending portion of the insulating layer, and forming a contact structure filling the opening and directly contacting the stacked structure, wherein the extending portion of the insulating layer is adjacent to a surface of the stacked structure directly contacting the contact structure.

    Manufacturing method of semiconductor device

    公开(公告)号:US12266696B2

    公开(公告)日:2025-04-01

    申请号:US18608890

    申请日:2024-03-18

    Abstract: A semiconductor device includes a III-V compound semiconductor layer, a III-V compound barrier layer, a gate trench, and a p-type doped III-V compound layer. The III-V compound barrier layer is disposed on the III-V compound semiconductor layer. The gate trench is disposed in the III-V compound barrier layer. The p-type doped III-V compound layer is disposed in the gate trench, and a top surface of the p-type doped III-V compound layer and a top surface of the I-V compound barrier layer are substantially coplanar.

    SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

    公开(公告)号:US20250107130A1

    公开(公告)日:2025-03-27

    申请号:US18976256

    申请日:2024-12-10

    Abstract: A semiconductor structure includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a first passivation layer on the insulating layer, a contact structure disposed on the first passivation layer and extending through the first passivation layer to directly contact a portion of the barrier layer, and an insulating layer interposed between the barrier layer and the first passivation layer and comprising an extending portion protruding toward a bottom corner of the contact structure.

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