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公开(公告)号:US20230335614A1
公开(公告)日:2023-10-19
申请号:US18215787
申请日:2023-06-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Che-Hung Huang , Wen-Jung Liao , Chun-Liang Hou , Chih-Tung Yeh
IPC: H01L29/66 , H01L29/778 , H01L21/308 , H01L29/20 , H01L29/205
CPC classification number: H01L29/66462 , H01L29/7787 , H01L21/3081 , H01L29/2003 , H01L29/205
Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.
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公开(公告)号:US20230290839A1
公开(公告)日:2023-09-14
申请号:US18199359
申请日:2023-05-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Tung Yeh , Chun-Liang Hou , Wen-Jung Liao , Chun-Ming Chang , Yi-Shan Hsu , Ruey-Chyr Lee
IPC: H01L29/417 , H01L29/778 , H01L29/66
CPC classification number: H01L29/4175 , H01L29/66462 , H01L29/7786 , H01L29/0684
Abstract: A high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation layer and the mesa structure. The mesa structure includes a channel layer, a barrier layer on the channel layer, two opposite first edges extending along a first direction, and two opposite second edges extending along a second direction. The contact structure includes a body portion and a plurality of protruding portions. The body portion penetrates through the passivation layer. The protruding portions penetrate through the barrier layer and a portion of the channel layer. In a top view, the body portion overlaps the two opposite first edges of the mesa structure without overlapping the two opposite second edges of the mesa structure.
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公开(公告)号:US11735644B2
公开(公告)日:2023-08-22
申请号:US17551149
申请日:2021-12-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Che-Hung Huang , Wen-Jung Liao , Chun-Liang Hou , Chih-Tung Yeh
IPC: H01L29/66 , H01L29/778 , H01L21/308 , H01L29/205 , H01L29/20
CPC classification number: H01L29/66462 , H01L21/3081 , H01L29/7787 , H01L29/2003 , H01L29/205
Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.
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公开(公告)号:US20230112917A1
公开(公告)日:2023-04-13
申请号:US17515541
申请日:2021-10-31
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ming-Hua Chang , Kun-Yuan Liao , Lung-En Kuo , Chih-Tung Yeh
IPC: H01L21/308 , H01L29/20 , H01L29/205 , H01L29/778 , H01L21/306 , H01L29/66
Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.
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公开(公告)号:US20220367694A1
公开(公告)日:2022-11-17
申请号:US17330420
申请日:2021-05-26
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Tung Yeh , Chun-Liang Hou , Wen-Jung Liao , Ruey-Chyr Lee
IPC: H01L29/778 , H01L29/66 , H01L29/20 , H01L29/205 , H01L29/45 , H01L29/40
Abstract: A semiconductor transistor structure with reduced contact resistance includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a two-dimensional electron gas (2DEG) layer at an interface between the barrier layer and the channel layer, and a recess in a contact region. The recess penetrates through the barrier layer and extends into the channel layer. An Ohmic contact metal is disposed in the recess. The Ohmic contact metal is in direct contact with a vertical side surface of the barrier layer in the recess and in direct contact with an inclined side surface of the 2DEG layer and the channel layer in the recess.
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公开(公告)号:US20220367693A1
公开(公告)日:2022-11-17
申请号:US17396793
申请日:2021-08-09
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ming-Hua Chang , Po-Wen Su , Chih-Tung Yeh
IPC: H01L29/778 , H01L29/20 , H01L29/66 , H01L21/311
Abstract: A semiconductor structure includes a substrate, a stacked structure on the substrate, an insulating layer on the stacked structure, a passivation layer on the insulating layer, and a contact structure through the passivation layer and the insulating layer and directly contacting the stacked structure. The insulating layer has an extending portion protruding from a sidewall of the passivation layer and adjacent to a surface of the stacked structure directly contacting the contact structure.
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公开(公告)号:US20220109058A1
公开(公告)日:2022-04-07
申请号:US17551149
申请日:2021-12-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chun-Ming Chang , Che-Hung Huang , Wen-Jung Liao , Chun-Liang Hou , Chih-Tung Yeh
IPC: H01L29/66 , H01L29/778 , H01L21/308 , H01L29/205 , H01L29/20
Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.
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公开(公告)号:US12274081B2
公开(公告)日:2025-04-08
申请号:US18519099
申请日:2023-11-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ming-Hua Chang , Po-Wen Su , Chih-Tung Yeh
IPC: H10D30/47 , H01L21/311 , H10D30/01 , H10D62/85
Abstract: A method for forming a semiconductor structure includes the steps of forming a stacked structure on a substrate, forming an insulating layer on the stacked structure, forming a passivation layer on the insulating layer, performing an etching process to form an opening through the passivation layer and the insulating layer to expose a portion of the stacked structure and an extending portion of the insulating layer, and forming a contact structure filling the opening and directly contacting the stacked structure, wherein the extending portion of the insulating layer is adjacent to a surface of the stacked structure directly contacting the contact structure.
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公开(公告)号:US12266696B2
公开(公告)日:2025-04-01
申请号:US18608890
申请日:2024-03-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Tung Yeh , Wen-Jung Liao
IPC: H01L29/66 , H01L29/20 , H01L29/778
Abstract: A semiconductor device includes a III-V compound semiconductor layer, a III-V compound barrier layer, a gate trench, and a p-type doped III-V compound layer. The III-V compound barrier layer is disposed on the III-V compound semiconductor layer. The gate trench is disposed in the III-V compound barrier layer. The p-type doped III-V compound layer is disposed in the gate trench, and a top surface of the p-type doped III-V compound layer and a top surface of the I-V compound barrier layer are substantially coplanar.
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公开(公告)号:US20250107130A1
公开(公告)日:2025-03-27
申请号:US18976256
申请日:2024-12-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ming-Hua Chang , Po-Wen Su , Chih-Tung Yeh
IPC: H01L29/778 , H01L21/311 , H01L29/20 , H01L29/66
Abstract: A semiconductor structure includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a first passivation layer on the insulating layer, a contact structure disposed on the first passivation layer and extending through the first passivation layer to directly contact a portion of the barrier layer, and an insulating layer interposed between the barrier layer and the first passivation layer and comprising an extending portion protruding toward a bottom corner of the contact structure.
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