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公开(公告)号：US09875708B2
公开(公告)日：2018-01-23
申请号：US14853803
申请日：2015-09-14
Inventor： Zongjun Zou , Kangpeng Yang , Yumin Xu
IPC: G09G5/00 , G09G3/36 , G09G3/3266
CPC classification number: G09G3/3677 , G09G3/3266 , G09G2310/0283 , G09G2310/0286 , G09G2310/067
Abstract: A driving circuit is provided, which includes multiple shift register units, at least one scan control unit and at least one all-gate-on unit. An operation of the driving circuit includes a driving phase and a discharging phase. During the driving phase, the at least one scan control unit controls the shift register units to output multiple driving signals successively in a first direction or in a second direction, the first direction being opposite to the second direction. During the discharging phase, the at least one all-gate-on unit controls the shift register units to output multiple driving signals simultaneously. An array substrate and a display apparatus each including the driving circuit are further provided.
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32.发明授权公开(公告)号：US09733759B2
公开(公告)日：2017-08-15
申请号：US14968110
申请日：2015-12-14
CPC classification number: G06F3/0416 , G06F3/044
Abstract: A driving circuit, an array substrate, a touch display device and a driving method of the touch display device. The first gate driving circuits and the touch driving circuits electrically connected with the first gate driving circuits are disposed in the driving circuit, and the secondary trigger signals outputted from the shift registers of the first gate driving circuit function as the strobe signals of the touch selection outputting units from the touch driving circuits, respectively.
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公开(公告)号：US20170228078A1
公开(公告)日：2017-08-10
申请号：US15497534
申请日：2017-04-26
Inventor： Shengpeng Hu , Yizhi Yang , Jiancai Huang , Yumin Xu
CPC classification number: G06F3/0412 , G06F3/0416 , G06F3/044 , G06F2203/04103
Abstract: A touch display substrate, including: a substrate including a display region and a non-display region; a plurality of common electrode blocks spaced apart from each other; a plurality of wirings; a vertical shift circuit including a plurality of cascaded vertical shift circuit units, and each of the plurality of vertical shift circuit units is connected with wirings corresponding to a column of common electrode blocks, and is configured to sequentially output touch driving signals to the column of common electrode blocks; and a controlling IC configured to output a touch driving signal to the vertical shift circuit; wherein, the plurality of common electrode blocks are divided into n groups of common electrode blocks by columns, and the controlling IC is configured to apply scan pulse signals with different frequencies to the groups of common electrode blocks in different touch scanning time periods.
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公开(公告)号：US20170192547A1
公开(公告)日：2017-07-06
申请号：US15162624
申请日：2016-05-24
Inventor： Chao Zheng , Min Huang , Zhonghuai Chen , Kangpeng Yang , Yumin Xu
CPC classification number: G06F3/041 , G06F3/0416 , G06F3/044 , G06F11/2221 , G09G3/2092
Abstract: The present disclosure provides an array substrate, a display panel and a method for detecting and restoring a display panel. The detection and restoring unit is configured to provide signals to the touch sensing units to perform detection and restoring. In the display region, each of the touch sensing units is provided with one first line and one second line, and the first line is connected with the touch sensing unit through a via hole. The first terminal of the first switch element is connected with a first terminal of the first line. The second terminal of the first switch element is connected with a first terminal of the second line. Each of the first terminal of the first line, the first terminal of the second line and the control terminal of the first switch element is connected with the detection and restoring unit.
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公开(公告)号：US11749179B2
公开(公告)日：2023-09-05
申请号：US17631472
申请日：2021-01-18
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor： Zongjun Zou , Ying Sun , Yumin Xu
CPC classification number: G09G3/32 , G09G3/006 , G09G2300/0408 , G09G2310/0267 , G09G2310/0283 , G09G2310/0286
Abstract: A display panel includes a scan driving circuit, signal pins and a first gating circuit. Signal pins include a detection signal pin and an enable signal pin. The scan driving circuit includes scan drive units disposed in a cascade manner. The first gating circuit includes a first switch unit and a second switch unit. An input terminal of the first switch unit is electrically connected to a scan signal detection terminal of an Nth-stage scan drive unit. An input terminal of the second switch unit is electrically connected to a scan signal detection terminal of a first-stage scan drive unit. An output terminal of the first switch unit and an output terminal of the second switch unit are both electrically connected to the detection signal pin. The first switch unit is configured to turn on in a forward scan detection stage and turn off in a backward scan detection stage. The second switch unit is configured to turn on in the backward scan detection stage and turn off in the backward scan detection stage.
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Patent Agency Ranking
公开(公告)号：US11676521B2
公开(公告)日：2023-06-13
申请号：US17443240
申请日：2021-07-22
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor： Sijian Luo , Changzhi Wu , Yumin Xu
CPC classification number: G09G3/20 , G09G2310/0243 , G09G2310/0267 , G09G2310/0286 , G09G2310/062 , G09G2310/08 , G11C19/287
Abstract: Provided is a display panel. The display panel includes multiple scanning lines, a gate driver circuit, and a timing controller. The timing controller is configured to: receive multiple data enable signals, generate a gate control signal, and provide the gate control signal for the gate driver circuit. The gate control signal includes a start signal, a first clock signal and a second clock signal. The multiple data enable signals are only within the active cycle. The timing controller is configured to generate a rising edge of the start signal within the vertical blanking cycle of the (N−1)th frame cycle. Alternatively, the timing controller is configured to generate a rising edge and a falling edge of the start signal within a time interval formed by a rising edge and a falling edge of a first data enable signal in the Nth frame cycle.
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公开(公告)号：US20220284842A1
公开(公告)日：2022-09-08
申请号：US17256631
申请日：2020-02-12
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor： Huiying Chen , Changzhi Wu , Ying Sun , Yumin Xu
IPC: G09G3/20
Abstract: Provided are a display panel and a display device. The display panel includes multiple cascaded gate drive units. Each gate drive unit includes a shift register unit and an inverted unit. The inverted unit is electrically connected to the shift register unit. A scan output terminal of the shift register unit is electrically connected to one scan line. An inverted scan output terminal of the inverted unit is electrically connected to one inverted scan line. The scan output terminal of the shift register unit outputs a first effective pulse signal. The inverted scan output terminal of the inverted unit outputs a second effective pulse signal. A time period corresponding to the first effective pulse signal at least partially overlaps a time period corresponding to the second effective pulse signal, and the type of the first effective pulse signal is opposite to the type of the second effective pulse signal.
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公开(公告)号：US11270093B2
公开(公告)日：2022-03-08
申请号：US16790314
申请日：2020-02-13
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd
Inventor： Meng Lai , Lifeng Lu , Zhilong Zhuang , Jiancai Huang , Yumin Xu , Xianyan Yang
IPC: G06K9/00 , G06K9/03 , H01L27/146
Abstract: The present disclosure provides a display panel and a display device. The display panel includes a plurality of fingerprint recognition circuits. At least one of the plurality of fingerprint recognition circuits includes a light sense signal obtaining unit and a subtracted. The light sense signal obtaining unit is configured to obtain a first light sense voltage value and a second light sense voltage value, the first light sense voltage value is related to a first power voltage value, the second light sense voltage value is related to a second power voltage value, and the first power voltage value is greater than the second power voltage value. The subtracted is configured to subtract the second light sense voltage value from the first light sense voltage value to obtain a light sense data value.
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公开(公告)号：US20210375178A1
公开(公告)日：2021-12-02
申请号：US17443240
申请日：2021-07-22
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor： Sijian Luo , Changzhi Wu , Yumin Xu
IPC: G09G3/20
Abstract: Provided is a display panel. The display panel includes multiple scanning lines, a gate driver circuit, and a timing controller. The timing controller is configured to: receive multiple data enable signals, generate a gate control signal, and provide the gate control signal for the gate driver circuit. The gate control signal includes a start signal, a first clock signal and a second clock signal. The multiple data enable signals are only within the active cycle. The timing controller is configured to generate a rising edge of the start signal within the vertical blanking cycle of the (N−1)th frame cycle. Alternatively, the timing controller is configured to generate a rising edge and a falling edge of the start signal within a time interval formed by a rising edge and a falling edge of a first data enable signal in the Nth frame cycle.
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公开(公告)号：US10977982B2
公开(公告)日：2021-04-13
申请号：US16590055
申请日：2019-10-01
Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.
Inventor： Zongjun Zou , Min Huang , Ying Sun , Yumin Xu
IPC: G09G3/20 , G09G3/3258 , H01L27/32
Abstract: Disclosed are a display panel and an electronic device. The display panel includes: a base substrate, a first non-display region, a display region surrounding the first non-display region, multiple data lines and multiple scanning lines. The display region includes multiple pixels each including m sub-pixels. In the first non-display region, at least two data lines are stacked and insulated from each other, and orthogonal projections of the at least two data lines on the base substrate are at least adjacently disposed. The multiple scanning lines do not intersect each other. At least two scanning lines each include a first scanning lead. The first scanning lead extends alternately in the first and second directions and is electrically connected to multiple pixels through first sides of the multiple pixels.
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