公开(公告)号：US4098131A

公开(公告)日：1978-07-04

申请号：US763865

申请日：1977-01-31

Applicant: Peter Renzel

Inventor： Peter Renzel

IPC: G01B17/02 ,  G01B21/08 ,  G01N29/07 ,  G01N29/44 ,  H03K3/66 ,  G01N29/04

CPC classification number: G01B17/02 ,  G01N29/07 ,  G01N29/343 ,  H03K3/66 ,  G01N2291/02854

Abstract: In order to increase the speed at which a workpiece is tested by the ultrasonic pulse-echo method, the dead time between individual measurement time intervals is shortened by providing a minimum predetermined time interval selected for the specific test conditions. When an echo responsive signal is manifest in the receiving circuit, in order to prevent the occurrence of phantom echo signals arising in the following measuring interval, the generation of the succeeding transmit signal is inhibited for the predetermined time interval after receipt of the last echo responsive electrical signal of the measuring interval having an amplitude exceeding a predetermined minimum amplitude. The test speed therefore, is made adaptive to the condition of the receipt of the number of echo responsive electrical signals exceeding a predetermined minimum amplitude.

Abstract translation: 为了通过超声波脉冲 - 回波法提高工件的测试速度，通过提供针对具体测试条件选择的最小预定时间间隔来缩短各个测量时间间隔之间的死区时间。 当在接收电路中显示回波响应信号时，为了防止在随后的测量间隔中出现幻像回波信号的发生，在接收到最后一个回波响应之后，预定时间间隔的生成被抑制 测量间隔的电信号具有超过预定最小振幅的振幅。 因此，测试速度适应于接收超过预定最小振幅的回波响应电信号的数量的条件。

公开(公告)号：US3936757A

公开(公告)日：1976-02-03

申请号：US515730

申请日：1974-10-17

Applicant: Ian T. Band ,  Kenneth J. MacLeod

Inventor： Ian T. Band ,  Kenneth J. MacLeod

IPC: G01R23/10 ,  H03K21/02 ,  H03K17/00 ,  H03K3/66

CPC classification number: G01R23/10 ,  H03K21/02

Abstract: An automatic gate control system for automatically controlling the gate of a multifunction counter for maximum resolution within a fixed maximum time limit includes a Gate Control Apparatus for Setting the Input Signal Counting Interval patented by Ian T. Band and disclosed in U.S. Pat. No. 3,693,097 issued Sept. 19, 1972, a timer responsive to a Q output of a D-type flip-flop and serially connected with an input of an OR gate and a Q output of the D-type flip-flop. The OR gate applies a set signal to a second flip-flop having a Q output coupled to a "D" input of the first flip-flop.

Abstract translation: 一种用于在固定的最大时限内自动控制多功能计数器的门以实现最大分辨率的自动门控制系统包括：用于设置由Ian T.B2获得专利的输入信号计数间隔的门控装置， 1972年9月19日授权的No.3,693,097，一个响应D型触发器的Q输出并与D型触发器的OR门和Q输出的输入串联连接的定时器。 或门将设置信号施加到具有耦合到第一触发器的“D”输入的Q输出的第二触发器。

公开(公告)号：US2154492A

公开(公告)日：1939-04-18

申请号：US8251536

申请日：1936-05-29

Applicant: RCA CORP

Inventor： HENRY CLOUGH NEWSOME

IPC: G01S1/02 ,  H03K3/66

CPC classification number: H03K3/66 ,  G01S1/02