Charged coupled device time base corrector system
    31.
    发明授权
    Charged coupled device time base corrector system 失效
    带电耦合器件时基校正器系统

    公开(公告)号:US4297728A

    公开(公告)日:1981-10-27

    申请号:US27926

    申请日:1979-04-06

    申请人: Virgil L. Lowe

    发明人: Virgil L. Lowe

    IPC分类号: H04N5/953 H04N5/04 H04N5/785

    CPC分类号: H04N5/953

    摘要: An improved charged coupled device time base corrector system to compensate for a change in the phase or frequency of input video signals, as occurs in the playback of a video tape recorder, by changing the nominal delay through the corrector, comprising, in combination, an input feedback circuit and an output feedback circuit. The input feedback circuit includes two cascaded infinite gain circuits, an infinite gain phase detector followed by an infinite gain voltage amplifier which gives an error voltage that controls the frequency of the voltage controlled oscillator (VCO) utilized to control the system delay. The output servo loop always adapts itself to the input error voltage. The VCO is thereby driven at a rate of change of its frequency proportional to the incoming error signal. .

    摘要翻译: 一种改进的电荷耦合器件时基校正器系统,通过改变通过校正器的标称延迟来补偿输入视频信号的相位或频率的变化,如在磁带录像机的重放中发生的,包括组合 输入反馈电路和输出反馈电路。 输入反馈电路包括两个级联的无限增益电路,一个无限增益相位检测器,后面是一个无限增益电压放大器,它提供一个误差电压,控制用于控制系统延迟的压控振荡器(VCO)的频率。 输出伺服环路总是适应输入误差电压。 因此,VCO以与频率成比例的频率变化的速率驱动。 。

    Buffered time base correction circuit
    32.
    发明授权
    Buffered time base correction circuit 失效
    缓冲时基校正电路

    公开(公告)号:US4206479A

    公开(公告)日:1980-06-03

    申请号:US16051

    申请日:1979-02-28

    申请人: John S. Hayward

    发明人: John S. Hayward

    IPC分类号: H04N5/073 H04N5/953 H04N5/76

    CPC分类号: H04N5/953 H04N5/0736

    摘要: A time base corrector for use in defluttering video signals employs a pair of analog shift registers which functionally sandwich a buffer register. Signals are serially applied to one register, say at a fluttering rate; then parallel shifted to the buffer register; then parallel shifted to the second analog shift register; then serially clocked out of the second analog shift register at a reference rate. With such signal processing, successive signals always follow the same signal path, thereby avoiding the prior art need for complementary circuit components. Components of the time base corrector form parts of a solid state device, means being provided therefor to assure that charge vestiges cannot occur after charge shifting.

    摘要翻译: 用于缩小视频信号的时基校正器采用功能上夹着缓冲寄存器的一对模拟移位寄存器。 信号连续地应用于一个寄存器,以飘飘的速度说; 然后平行移位到缓冲寄存器; 然后平行移位到第二个模拟移位寄存器; 然后以参考速率从第二模拟移位寄存器中串行计时。 通过这种信号处理,连续信号总是遵循相同的信号路径,从而避免了现有技术对互补电路部件的需要。 时基校正器的组件形成固态器件的部件,为此提供了用于确保电荷转移后电荷残余不会发生的装置。

    Time base correction circuit employing controlled parallel signal
transfers between analog storage registers
    33.
    发明授权
    Time base correction circuit employing controlled parallel signal transfers between analog storage registers 失效
    时基校正电路采用模拟存储寄存器之间的受控并行信号传输

    公开(公告)号:US4206478A

    公开(公告)日:1980-06-03

    申请号:US16052

    申请日:1979-02-28

    申请人: Jerry R. Horak

    发明人: Jerry R. Horak

    IPC分类号: H04N5/073 H04N5/953 H04N5/76

    CPC分类号: H04N5/953 H04N5/0736

    摘要: A circuit for correcting a fluttering video signal to conform to a standard time base utilizes a set of analog shift registers that are specially adapted to permit controlled parallel transfer of video line-scan information between registers. Such provision for parallel transfers permits exclusive assignment of input and output functions (and corresponding clocking) to respective registers. In a presently preferred implementation, three charge-transfer-type registers are aligned side by side on a single "chip" and control of parallel charge transfers between each cooperating pair of adjacent registers is achieved through the use of an interposed electrode structure.

    摘要翻译: 用于校正符合标准时基的抖动视频信号的电路利用一组模拟移位寄存器,其特别适于允许在寄存器之间控制并行传输视频行扫描信息。 并行传输的这种规定允许输入和输出功能(和相应的时钟)独占地分配给各个寄存器。 在目前优选的实施方案中,三个电荷转移型寄存器在单个“芯片”上并排排列,并且通过使用插入的电极结构来实现每个配对的相邻寄存器对之间的并联电荷转移的控制。

    IMAGE CAPTURING APPARATUS AND CONTROL METHOD THEREOF

    公开(公告)号:US20220239823A1

    公开(公告)日:2022-07-28

    申请号:US17718566

    申请日:2022-04-12

    发明人: Atsushi Fukuda

    摘要: An image capturing apparatus comprises an interface configured to connect to an external apparatus, a transmitting unit configured to transmit image data to an external apparatus connected by the interface, a processing unit configured to encode the image data with a predetermined format, a determination unit configured to determine whether or not image data to be encoded by the processing unit includes decoding information for decoding the image data, and a control unit configured to switch, based on the determination result, between processing for transmitting image data encoded by the processing unit and the decoding information to the external apparatus and processing for transmitting an image file in which image data including the decoding information is encoded to the external apparatus.

    Reproducing apparatus with time base corrector
    36.
    发明授权
    Reproducing apparatus with time base corrector 失效
    具有时基校正器的再现装置

    公开(公告)号:US5758010A

    公开(公告)日:1998-05-26

    申请号:US329777

    申请日:1994-10-27

    申请人: Hirotake Ando

    发明人: Hirotake Ando

    IPC分类号: H04N5/953 H04N5/95

    CPC分类号: H04N5/953

    摘要: A reproducing apparatus for reproducing a signal by moving a record bearing medium and a reproducing head relative to each other is provided with a time base corrector for correcting the time base of the signal reproduced. The time base corrector is characterized in that the operating state thereof is changed from one state over to another according to whether or not the controlled movement of the medium and the head relative to each other is in a steady state.

    摘要翻译: 用于通过相对于彼此移动记录承载介质和再现头来再现信号的再现装置设置有用于校正所再现信号的时基的时基校正器。 时基校正器的特征在于,根据介质和头相对于彼此的受控运动是否处于稳定状态,其操作状态从一个状态改变到另一状态。

    Reproducing apparatus with time base corrector
    37.
    发明授权
    Reproducing apparatus with time base corrector 失效
    具有时基校正器的再现装置

    公开(公告)号:US5220736A

    公开(公告)日:1993-06-22

    申请号:US703600

    申请日:1991-05-20

    申请人: Hirotake Ando

    发明人: Hirotake Ando

    IPC分类号: H04N5/953

    CPC分类号: H04N5/953

    摘要: A reproducing apparatus for reproducing a signal by moving a record bearing medium and a reproducing head relative to each other is provided with a time base corrector for correcting the time base of the signal reproduced. The time base corrector is characterized in that the operating state thereof is changed from one state over to another according to whether or not the controlled movement of the medium and the head relative to each other is in a steady state.

    摘要翻译: 用于通过相对于彼此移动记录承载介质和再现头来再现信号的再现装置设置有用于校正所再现信号的时基的时基校正器。 时基校正器的特征在于,根据介质和头相对于彼此的受控运动是否处于稳定状态,其操作状态从一个状态改变到另一状态。

    Time base correction circuit
    38.
    发明授权
    Time base correction circuit 失效
    时基校正电路

    公开(公告)号:US4692708A

    公开(公告)日:1987-09-08

    申请号:US706356

    申请日:1985-02-27

    申请人: Tetsuo Shimizu

    发明人: Tetsuo Shimizu

    CPC分类号: H04N9/802 G11B20/18 H04N9/893

    摘要: A time base correction circuit for correcting time base error commonly present in two or more signals having components in different frequency bands, wherein the number of stages of the respective clock response delay elements is reduced. A single clock generator supplies clock pulse signals for plural clock response delay elements. The clock generator output is connected directly to the clock response delay element to which is applied the input signal having the highest frequency component. Frequency dividers are connected between the clock generator and each of the other clock response delay elements.

    摘要翻译: 一种时基校正电路,用于校正通常存在于具有不同频带中的分量的两个或更多个信号中的时基误差,其中各个时钟响应延迟元件的级数减少。 单个时钟发生器为多个时钟响应延迟元件提供时钟脉冲信号。 时钟发生器输出直接连接到施加具有最高频率分量的输入信号的时钟响应延迟元件。 分频器连接在时钟发生器和每个其他时钟响应延迟元件之间。

    Video-signal time-axis correction apparatus
    39.
    发明授权
    Video-signal time-axis correction apparatus 失效
    视频信号时间轴校正装置

    公开(公告)号:US4673980A

    公开(公告)日:1987-06-16

    申请号:US865988

    申请日:1986-05-22

    CPC分类号: H04N5/073

    摘要: A time-axis of a digital video-signal is converted to a standard time-axis by changing a clock signal contained therein to a standard clock signal and by locking phases of input synchronizing signals contained therein onto the phase of the standard clock signal through a memory for alternately writing and reading the digital video signal at one half of the period of the standard clock signal. As a result, the time-axis correction of the digital video signal is efficiently effected through the memory having a small capacity and a simplified controlling arrangement.

    摘要翻译: 数字视频信号的时间轴通过将其中包含的时钟信号改变为标准时钟信号并通过将包含在其中的输入同步信号的相位锁定在标准时钟信号的相位上而被转换为标准时间轴 存储器,用于在标准时钟信号的周期的一半周期交替地写入和读取数字视频信号。 结果,通过具有小容量和简化的控制装置的存储器有效地实现了数字视频信号的时间轴校正。

    Magnetic reproducing apparatus
    40.
    发明授权
    Magnetic reproducing apparatus 失效
    磁再现装置

    公开(公告)号:US4623940A

    公开(公告)日:1986-11-18

    申请号:US525567

    申请日:1983-08-22

    摘要: A magnetic reproducing apparatus which has a pair of main rotatable heads having different azimuth angles and a pair of auxiliary rotatable heads having different azimuth angles. When a magnetic tape is played back while it runs at a speed different from that at which it runs during a recording mode, playback output signals from the main and auxiliary rotatable heads are switched over to replace a reduction in the outputs from the main rotatable heads with the outputs from the auxiliary rotatable heads to produce a combined playback output signal. The combined playback output signal is passed through a variable delay line having a delay time varied by an output from a detector circuit which detects variations in horizontal synchronous signal intervals of the combined playback output signal. This varied delay time of the variable delay line can eliminate any skew distortions which would appear on a displayed image on the screen due to the variations in horizontal synchronous signal intervals of the combined playback output signal.

    摘要翻译: 具有一对具有不同方位角的主旋转头和具有不同方位角的一对辅助旋转头的磁再现装置。 当磁带在与记录模式期间运行的速度不同的速度下播放时,来自主旋转磁头和辅助旋转磁头的重放输出信号被切换以替代来自主旋转磁头的输出的减小 与来自辅助可旋转头的输出产生组合的重放输出信号。 组合的重放输出信号通过可变延迟线,该可变延迟线具有由检测器电路的输出变化的延迟时间,该检测器电路检测组合的重放输出信号的水平同步信号间隔的变化。 可变延迟线的这种变化的延迟时间可以消除由于组合的重放输出信号的水平同步信号间隔的变化而在屏幕上显示的图像上出现的任何偏斜失真。