Abstract:
A method for estimating the power consumption of an electronic circuit under design that employs a Cycle-Accurate Functional Description (CAFD) which advantageously provides the accuracy achieved by RTL power estimation with the speed and speed of higher-level approaches.
Abstract:
A method automatically determines groups of words or phrases that are descriptive names of a small set of documents, as well as infers concepts in the small set of documents that are more general and more specific than the descriptive names, without any prior knowledge of the hierarchy or the concepts, in a language independent manner. The descriptive names and the concepts may not even be explicitly contained in the documents. The primary application of the invention is for searching of the World Wide Web, but the invention is not limited solely to use with the World Wide Web and may be applied to any set of documents. Classes of features are identified in order to promote understanding of a set of documents. Preferably, there are three classes of features. “Self” features or terms describe the cluster as a whole. “Parent” features or terms describe more general concepts. “Child” features or terms describe specializations of the cluster. The self features can be used as a recommended name for a cluster, while parents and children can be used to place the clusters in the space of a larger collection. Parent features suggest a more general concept, while children features suggest concepts that describe a specialization of the self feature(s). Automatic discovery of parent, self and child features is useful for several purposes including automatic labeling of web directories and improving information retrieval.
Abstract:
A method for the static analysis of concurrent multi-threaded software which bypasses the state explosion situation that plagues the prior art, thereby making our method scalable while—at the same time—producing no loss in precision. Our inventive method maintains patterns of lock acquisition and lock release by individual threads by constructing augmented versions of the threads. Once the augmented versions have been constructed, our inventive method verifies the concurrent program using existing tools for the verification of sequential programs—thereby greatly reducing implementation overhead. Finally, our inventive augmentation and method is carried out in an automatic manner—without requiring user intervention.
Abstract:
A dynamic memory compression architecture is disclosed which allows applications with working data sets exceeding the physical memory of an embedded system to still execute correctly. The dynamic memory compression architecture provides “on-the-fly” compression and decompression of the working data in a manner which is transparent to the user and which does not require special-purpose hardware. A new compression technique is also herein disclosed which is particularly advantageous when utilized with the above-mentioned dynamic memory compression architecture.
Abstract:
A storage management architecture is disclosed which is particularly advantageous for devices such as embedded systems. The architecture provides a framework for a compression/decompression system which advantageously is software-based and which facilitates the compression of both instruction code and writeable data.
Abstract:
A method and apparatus for medium access control in a wireless ad hoc network is disclosed that takes advantage of physical layer properties to jointly and collectively optimize in a distributed fashion transmission parameters such as beam-patterns and transmit powers of all active links in the network. To resolve signal transmission contention, each potential link is associated with a persistence parameter and the persistence parameter is adapted locally, with no central control, to provide medium access for transmissions. Where a node contending for a transmission slot is unable to optimize its transmission parameters due to an invalidity condition or infeasibility condition, the persistence parameter is updated, preferably so as to reduce the probability of such conditions.
Abstract:
A system and method is disclosed for formal verification of software programs that advantageously improves performance of an abstraction-refinement loop in the verification system.
Abstract:
To determine the cause of a problem, evaluating and tracing how an individual request traverses through various components in the system makes possible new detection techniques. The present invention relates to detecting faults in a computer system. In accordance with an embodiment of the invention, a method and apparatus detects a fault in a system by receiving a request and generating a trace based on the request. The trace is a sequence of components used to service the request. The method and apparatus also compares the trace with a stored automaton to determine whether the trace is an anomaly. The stored automaton describes traces.
Abstract:
A technique for construction of finite-length low-density parity check (LDPC) codes is herein disclosed which advantageously provides a flexible tradeoff of low decoding thresholds and low error-floors.
Abstract:
A new differential phase-shift-keyed demodulator is disclosed which can achieve signal demodulation at different wavelengths on ITU grids without requiring active thermal tuning. In accordance with another aspect of the invention, a low-crosstalk demodulator is disclosed which reduces channel leakage by placing neighboring channels at non-optimal interference positions. A demodulator in accordance with the invention may be deployed in a WDM optical system.