公开(公告)号：US20240362084A1

公开(公告)日：2024-10-31

申请号：US18677458

申请日：2024-05-29

申请人： Intel Corporation

发明人： STAV GURTOVOY ,  MATEUSZ MARIA PRZYBYLSKI ,  MICHAEL APODACA ,  MANJUNATH DS

IPC分类号： G06F9/52 ,  G06F9/48 ,  G06T1/20

CPC分类号： G06F9/52 ,  G06F9/4881 ,  G06F9/522 ,  G06T1/20

摘要： An apparatus to facilitate thread synchronization is disclosed. The apparatus comprises one or more processors to execute a producer thread to generate a plurality of commands, execute a consumer thread to process the plurality of commands and synchronize the producer thread with the consumer thread, including updating a producer fence value upon generation of in-order commands, updating a consumer fence value upon processing of the in-order commands and performing a synchronization operation based on the consumer fence value, wherein the producer fence value and the consumer fence value each correspond to an order position of an in-order command.

公开(公告)号：US12131403B2

公开(公告)日：2024-10-29

申请号：US18231126

申请日：2023-08-07

申请人： Imagination Technologies Limited

发明人： Roger Hernando Buch ,  Panagiotis Velentzas ,  Richard Broadhurst ,  Xile Yang ,  John W. Howson

IPC分类号： G06T1/20 ,  G06F9/48 ,  G06F9/50 ,  G06F9/52 ,  G06F12/02 ,  G06T1/60

CPC分类号： G06T1/20 ,  G06F9/4881 ,  G06F9/5038 ,  G06F9/52 ,  G06F12/0261 ,  G06T1/60

摘要： Methods and apparatus for merging tasks in a graphics pipeline in which, subsequent to a trigger to flush a tag buffer, one or more tasks from the flushed tag buffer are generated, each task comprising a reference to a program and plurality of fragments on which the program is to be executed, wherein a fragment is an element of a primitive at a sample position. It is then determined whether merging criteria are satisfied and if satisfied, one or more fragments from a next tag buffer flush are added to a last task of the one or more tasks generated from the flushed tag buffer.

公开(公告)号：US20240289183A1

公开(公告)日：2024-08-29

申请号：US18114671

申请日：2023-02-27

申请人： NVIDIA Corporation

发明人： Jesus Ramos ,  Jiri Johannes Kraus ,  Sebastian Jodlowski ,  Fnu Vishnuswaroop Ramesh

IPC分类号： G06F9/30 ,  G06F9/38

CPC分类号： G06F9/52 ,  G06F9/541

摘要： Apparatuses, systems, and techniques to execute software programs. In at least one embodiment, an application programming interface (API) is performed to cause context information to be updated to indicate whether one or more memory operations to be performed are dependent on one or more other memory operations.

公开(公告)号：US20240272939A1

公开(公告)日：2024-08-15

申请号：US18442603

申请日：2024-02-15

申请人： Deep Vision Inc.

发明人： Mohamed Shahim ,  Sreenivas Aerra Reddy ,  Raju Datla ,  Lava Kumar Bokam ,  Suresh Kumar Vennam ,  Sameek Banerjee

IPC分类号： G06F9/48 ,  G06F9/52 ,  G06N3/063

CPC分类号： G06F9/4881 ,  G06F9/485 ,  G06F9/52 ,  G06N3/063

摘要： A method includes: dequeuing a signal primitive from a signaling command queue in the set of command queues, the signal primitive pointing to a waiting command queue; in response to the signal primitive pointing to the waiting command queue, incrementing a number of pending signal primitives in the signal-wait counter matrix; dequeuing a wait primitive from the waiting command queue, the wait primitive pointing to the signaling command queue; in response to the wait primitive pointing to the signaling command queue, accessing the register to read the number of pending signal primitives; in response to the number of pending signal primitives indicating at least one pending signal primitive: decrementing the number of pending signal primitives; and dequeuing an instruction from the waiting command queue; and dispatching a control signal representing the instruction to a resource.

公开(公告)号：US12061936B2

公开(公告)日：2024-08-13

申请号：US17618016

申请日：2020-03-05

申请人： HITACHI, LTD.

发明人： Takuma Nomizu ,  Hidehiro Kawai ,  Masaaki Ogawa

IPC分类号： G06F9/52

CPC分类号： G06F9/52

摘要： A synchronous core processing unit executes the same program as a program executed by another computer for an execution unit at a synchronization timing synchronized with a synchronous core processing unit of the other computer, and migrates the program being executed for which migration is requested according to characteristics of the program to a quasi-synchronous core processing unit. The quasi-synchronous core processing unit executes the program migrated from the synchronous core processing unit, and then migrates the program to the synchronous core processing unit. The synchronous core processing unit outputs, to an output comparison machine, an execution result obtained by executing the program migrated from the quasi-synchronous core processing unit at the synchronization timing.

公开(公告)号：US12061621B2

公开(公告)日：2024-08-13

申请号：US17387194

申请日：2021-07-28

申请人： Bank of America Corporation

发明人： Daniel Ebenezer ,  Dilip Raja ,  Giridhar Nakkala ,  Jon W. Gulickson ,  Yadav Khanal ,  Miranda Carr

IPC分类号： G06F16/00 ,  G06F9/52 ,  G06F16/215 ,  G06F16/25 ,  G06F16/901

CPC分类号： G06F16/254 ,  G06F9/52 ,  G06F16/215 ,  G06F16/258 ,  G06F16/902

摘要： Methods for hybrid job processing may include receiving raw data records stored within a plurality of tables from a plurality of systems of record at a raw data layer within a data exchange. Methods may include generating, based on a data model, a list of dependencies between the plurality of tables. Each table included in a second subset of the plurality of tables may be dependent on at least one table included in a first subset of the plurality of tables. Methods may include processing the first subset of the plurality of tables concurrently with one another. The processing includes modeling the raw data records and transmitting the modeled data records to the model data layer. Methods may include processing each table included in the second subset after completion of processing of the table included in the first subset from which the table in the second subset depends on.

公开(公告)号：US12041123B2

公开(公告)日：2024-07-16

申请号：US17339331

申请日：2021-06-04

申请人： VMWare LLC

发明人： Jayaprakash Mara ,  Xinpi Du ,  Sophat Nouv ,  Ravi Sarma ,  Ali Mohsin

IPC分类号： H04L29/08 ,  G06F9/52 ,  G06F9/54 ,  H04L67/104 ,  H04L67/1095

CPC分类号： H04L67/104 ,  G06F9/52 ,  G06F9/541 ,  H04L67/1095

摘要： Examples described herein include systems and methods for synchronizing applications that target different software development kits (“SDK”). The system can execute a bridge application that registers an implementation of a content provider class. This allows the bridge application to communicate with a first application targeting a first SDK. The bridge application can also register to send and receive implicit broadcasts. After the bridge application verifies the request, it can broadcast to a second cluster of applications registered with an operating system to receive implicit broadcasts. Similarly, the bridge application can receive implicit broadcasts and synchronize those requests with a first cluster of applications by using the implemented content provider methods.

公开(公告)号：US20240231967A1

公开(公告)日：2024-07-11

申请号：US18094182

申请日：2023-01-06

申请人： Mellanox Technologies, Ltd.

发明人： Diane Orf ,  Mark Rosenbluth ,  Michael Cotsford ,  Rui Xu ,  Shreya Tekade

IPC分类号： G06F9/54 ,  G06F9/52

CPC分类号： G06F9/546 ,  G06F9/52

摘要： An integrated circuit includes a set of functional units having at least a first functional unit and a second functional unit. The first functional unit includes first processing circuitry and a first circuit coupled to the first processing circuitry to receive a message from the second functional unit of the set of functional units. The first circuit is further to delay the message for the first processing circuitry for a predetermined duration, where the predetermined duration is based in part on a first value representing a first distance between the first functional unit and the second functional unit and a second value representing a second distance between the second functional unit and a functional unit of the set of functional units that is farthest away from the second functional unit.

公开(公告)号：US20240220315A1

公开(公告)日：2024-07-04

申请号：US18091443

申请日：2022-12-30

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Suchita Pati ,  Shaizeen Aga ,  Nuwan Jayasena ,  Matthew David Sinclair

IPC分类号： G06F9/48 ,  G06F9/52

CPC分类号： G06F9/4881 ,  G06F9/52

摘要： A processing system includes a scheduling mechanism for producing data for fine-grained reordering of workgroups of a kernel to produce blocks of data, such as for communication across devices to enable overlapping of a producer computation with an all-reduce communication across the network. This scheduling mechanism enables a first parallel processor to schedule and execute a set of workgroups of a producer operation to generate data for transmission to a second parallel processor in a desired traffic pattern. At the same time, the second parallel processor schedules and executes a different set of workgroups of the producer operation to generate data for transmission in a desired traffic pattern to a third parallel processor or back to the first parallel processor.

公开(公告)号：US20240211257A1

公开(公告)日：2024-06-27

申请号：US18089385

申请日：2022-12-27

申请人： Microsoft Technology Licensing, LLC

发明人： Mallik BULUSU ,  Tom Long NGUYEN ,  Daini XIE ,  Karunakara KOTARY ,  Muhammad Ashfaq AHMED ,  Subhankar PANDA ,  Ravi Mysore Shantamurthy

IPC分类号： G06F9/30 ,  G06F8/65 ,  G06F9/52 ,  G06F11/07

CPC分类号： G06F9/30047 ,  G06F8/65 ,  G06F9/52 ,  G06F11/0793

摘要： A computer implemented method includes creating a cache within system management memory to cache data from a firmware flash memory to allow access to the cache by system firmware, providing a baseboard management controller ownership of the firmware flash memory in a server, updating the firmware in the firmware flash memory via the baseboard management controller, relinquishing baseboard management controller ownership of firmware flash memory upon completion of updating the firmware, and flushing the cache back to the firmware flash memory in response to baseboard management controller relinquishing ownership of the firmware flash memory.