LIQUID CRYSTAL DROPPING AND DISTRIBUTING METHOD AND CELL ASSEMBLING METHOD

    公开(公告)号:US20190271870A1

    公开(公告)日:2019-09-05

    申请号:US16145464

    申请日:2018-09-28

    Abstract: The present disclosure provides a liquid crystal (LC) dropping and distributing method for a display panel. The LC dropping and distributing method includes forming a first LC region, the first LC region being an equilateral polygon symmetric about its center and having a first symmetric axis and a second symmetric axis perpendicular to each other; and forming two second LC regions, the two second LC regions being located at two sides of the first LC region respectively and being symmetric about the first symmetric axis, and the two second LC regions being both disposed to be spaced apart from the first LC region, each of the two second LC regions including a plurality of LC sub-regions arranged at intervals.

    Thin film transistor, array substrate and display device having slanted gate electrodes

    公开(公告)号:US12206003B2

    公开(公告)日:2025-01-21

    申请号:US18093063

    申请日:2023-01-04

    Abstract: A thin film transistor, an array substrate and a display device are provided. The thin film transistor is on a base substrate and includes a gate electrode, a first electrode, and a second electrode on the base substrate. The gate electrode includes a first body portion and a first extension portion extending along the first direction, electrically connected with the first body portion, and spaced apart from the first body portion by a first spacing. The first electrode includes a first overlapping end, an orthographic projection of the first overlapping end on the base substrate at least partially overlaps with an orthographic projection of the first body portion on the base substrate; a first compensation end at a side of the first overlapping end away from the first body portion, an orthographic projection of the first compensation end on the base substrate at least partially overlaps with an orthographic projection of the first extension portion on the base substrate; and a first intermediate portion connecting the first overlapping end and the first compensation end, an orthographic projection of the first intermediate portion on the base substrate is within an orthographic projection of the first spacing on the base substrate.

    ARRAY SUBSTRATE AND DISPLAY DEVICE
    49.
    发明申请

    公开(公告)号:US20250022884A1

    公开(公告)日:2025-01-16

    申请号:US18276646

    申请日:2022-07-14

    Abstract: Provided is an array substrate, including: a substrate; a first insulating layer and a second insulating layer that are successively stacked; a first electrode disposed on a side, proximal to the substrate, of the first insulating layer; a second electrode disposed between the first insulating layer and the second insulating layer; and a lap electrode disposed on a side, distal from the substrate, of the second insulating layer. The array substrate includes a plurality of first vias and a plurality of second vias. The lap electrode is electrically connected to the first electrode and is electrically connected to the second electrode. An orthographic projection of the first electrode on the substrate is overlapped with an orthographic projection of the second electrode on the substrate, and covers a region between at least one of the first vias and at least one of the second vias.

    DISPLAY SUBSTRATE, REPAIR METHOD AND DISPLAY DEVICE

    公开(公告)号:US20250014491A1

    公开(公告)日:2025-01-09

    申请号:US18264331

    申请日:2022-09-23

    Abstract: A driving module includes N driving circuits connected in series; the driving circuit includes an input terminal; N is a positive integer; input terminals of first a stages of driving circuits included in the driving module are electrically connected to an initial voltage line; a is a positive integer; an input terminal of an nth stage of driving circuit included in the driving module is electrically connected to an output terminal of an (n−m)th stage of driving circuit included in the driving module through an input cascade line; n and m are positive integers, and m is less than n; the driving module further includes at least one connection line, there is an overlapping portion between an orthographic projection of the connection line on the base substrate and an orthographic projection of the initial voltage line on the base substrate.

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