公开(公告)号：US07495989B2

公开(公告)日：2009-02-24

申请号：US11484532

申请日：2006-07-11

申请人： Jin-Hyeok Choi ,  Sam-Yong Bahng ,  Chil-Hee Chung

发明人： Jin-Hyeok Choi ,  Sam-Yong Bahng ,  Chil-Hee Chung

IPC分类号： G11C5/14

CPC分类号： G11C5/145 ,  G11C16/30

摘要： A memory card includes a non-volatile memory; and a power management unit for receiving an external supply voltage to supply an operating voltage to the non-volatile memory. The power management unit boosts/bypasses the external supply voltage based on whether the external supply voltage is lower than a detection voltage and then outputs the boosted/bypassed voltage as the operating voltage of the non-volatile memory.

摘要翻译： 存储卡包括非易失性存储器; 以及电源管理单元，用于接收外部电源电压以向非易失性存储器提供工作电压。 电源管理单元根据外部电源电压是否低于检测电压来提升/旁路外部电源电压，然后输出升压/旁路电压作为非易失性存储器的工作电压。

公开(公告)号：US20080177934A1

公开(公告)日：2008-07-24

申请号：US11796978

申请日：2007-04-30

申请人： Jae-Sung Yu ,  Jin-Hyeok Choi

发明人： Jae-Sung Yu ,  Jin-Hyeok Choi

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F11/1072 ,  G11C2211/5641

摘要： A method of programming a multilevel cell flash memory includes dividing a memory cell array of the flash memory into a user block and a cache block, programming first LSB data into a page of the user block, programming first MSB data into the page of the user block after programming the first LSB data, programming second LSB data into a page of the cache block, and storing control data for controlling the flash memory in the cache block.

摘要翻译： 一种编程多电平单元闪速存储器的方法包括将闪速存储器的存储单元阵列划分成用户块和高速缓存块，将第一LSB数据编程成用户块的页面，将第一MSB数据编程到用户的页面中 编程第一LSB数据之后，将第二LSB数据编程到高速缓存块的页面中，以及存储用于控制高速缓存块中的闪存的控制数据。

公开(公告)号：US20070236996A1

公开(公告)日：2007-10-11

申请号：US11762537

申请日：2007-06-13

申请人： Jin-Hyeok CHOI ,  Sam-Yong BAHNG ,  Chil-Hee CHUNG

发明人： Jin-Hyeok CHOI ,  Sam-Yong BAHNG ,  Chil-Hee CHUNG

IPC分类号： G11C16/30

CPC分类号： G11C5/145 ,  G11C16/30

摘要： A memory card includes a non-volatile memory; and a power management unit for receiving an external supply voltage to supply an operating voltage to the non-volatile memory. The power management unit boosts/bypasses the external supply voltage based on whether the external supply voltage is lower than a detection voltage and then outputs the boosted/bypassed voltage as the operating voltage of the non-volatile memory.

摘要翻译： 存储卡包括非易失性存储器; 以及电源管理单元，用于接收外部电源电压以向非易失性存储器提供工作电压。 电源管理单元根据外部电源电压是否低于检测电压来提升/旁路外部电源电压，然后输出升压/旁路电压作为非易失性存储器的工作电压。

公开(公告)号：US06538944B2

公开(公告)日：2003-03-25

申请号：US10020578

申请日：2001-12-18

申请人： Jin Hyeok Choi

发明人： Jin Hyeok Choi

IPC分类号： G11C700

CPC分类号： G11C11/4091 ,  G11C7/08

摘要： A semiconductor memory device having a word line enable sensing block for driving sense amplifiers only when a word line is enabled. In this way, an enable time point of the sense amplifiers is controlled according to variations in operating conditions such as a temperature, process, voltage and size of a memory cell. In addition, the semiconductor memory device can embody an embedded memory logic.

公开(公告)号：US06272053B1

公开(公告)日：2001-08-07

申请号：US09283736

申请日：1999-04-02

申请人： Jin Hyeok Choi

发明人： Jin Hyeok Choi

IPC分类号： G06F1200

CPC分类号： G11C7/1057 ,  G11C5/066 ,  G11C7/1051 ,  G11C7/1078

摘要： The present invention relates to a semiconductor memory device; and, more particular, to DRAM and SRAM having a common pin for address and data signals. A semiconductor memory circuit in accordance with the present invention has at least one common signal input terminal for receiving data signals and address signals, wherein the common signal input terminal is coupled to a plurality signal paths and a signal path selector for selecting one of the plurality signal paths in response to a write enable signal, a read enable and a control signal from a memory controller. The signal path selector has a plurality of buffers on the signal paths and the signal path selector selects one of the buffers in response to a write enable signal, a read enable and a control signal from a memory controller.

摘要翻译： 本发明涉及半导体存储器件; 更具体地说，涉及具有用于地址和数据信号的公共引脚的DRAM和SRAM。 根据本发明的半导体存储器电路具有用于接收数据信号和地址信号的至少一个公共信号输入端，其中公共信号输入端耦合到多个信号路径，以及信号路径选择器，用于选择多个信号 响应于写使能信号的信号路径，来自存储器控制器的读使能和控制信号。 信号路径选择器在信号路径上具有多个缓冲器，并且信号路径选择器响应于来自存储器控制器的写入使能信号，读取使能和控制信号选择一个缓冲器。

公开(公告)号：US6128241A

公开(公告)日：2000-10-03

申请号：US473207

申请日：1999-12-27

申请人： Jin-hyeok Choi

发明人： Jin-hyeok Choi

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C29/785

摘要： A repair circuit of a semiconductor memory device includes a programming circuit operating independently from a high voltage supply, to replace a defective cell with a redundant cell using an anti-fuse, by generating a repair value based on an address signal being input to the memory device. The repair circuit includes an operation switch having an output for outputting a charge voltage in response to a charge/discharge signal; at least one programming circuit of a series connection of an anti-fuse and a transistor, connected between the output of the operation switch and ground, to set a programmed state of the anti-fuse according to the address signal; a supply for an externally generating a high voltage to the anti-fuse of the programming circuit; a first buffer, connected between the programming circuit and the operation switch, to transmit the charge voltage output to the programming circuit and to block the externally generated high voltage supplied to the programming circuit; a second buffer, connected between the programming circuit and the high-voltage supply, to transmit the externally generated high voltage and to block the charge voltage output to the programming circuit; and an output unit to output the repair value, the repair value being indicative of the programmed state set by the programming circuit. A bank selector may be connected between the programming circuit and ground, to select one bank of anti-fuses in response to a block address signal.

摘要翻译： 半导体存储器件的修复电路包括独立于高压电源工作的编程电路，通过使用反熔丝替换具有冗余电池的故障单元，通过基于输入到存储器的地址信号产生修复值 设备。 修理电路包括具有用于响应于充电/放电信号输出充电电压的输出的操作开关; 连接在操作开关的输出和地之间的反熔丝和晶体管的串联连接的至少一个编程电路，以根据地址信号设置反熔丝的编程状态; 用于向编程电路的反熔丝外部产生高电压的电源; 连接在编程电路和操作开关之间的第一缓冲器，将输出的充电电压传送到编程电路，并阻止提供给编程电路的外部产生的高电压; 连接在编程电路和高压电源之间的第二缓冲器，用于传输外部产生的高电压并阻止向编程电路输出的充电电压; 以及输出单元，用于输出修复值，修复值指示由编程电路设置的编程状态。 存储体选择器可以连接在编程电路和地之间，以响应于块地址信号来选择一组反熔丝。