公开(公告)号：US5822336A

公开(公告)日：1998-10-13

申请号：US749235

申请日：1996-11-14

Applicant: Lih-Jyh Weng ,  Ba-Zhong Shen

Inventor： Lih-Jyh Weng ,  Ba-Zhong Shen

IPC: G11B20/18 ,  H03M13/00 ,  H03M13/15

CPC classification number: H03M13/1515 ,  H03M13/00

Abstract: An error correction system includes an encoder that uses a modified Reed-Solomon code to encode m-bit data symbols over GF(2.sup.m+i) and form a preliminary code with d-1 (m+i)-bit ECC symbols. The encoder then modifies the ECC symbols by combining the preliminary code word with a combination of one or more modifying code words to produce modified ECC symbols that have i bits set in a pre-selected pattern. This combination also results in "R" pseudo redundancy symbols that include the i-bit pattern being appended to the modified ECC symbols. The encoder truncates the i-bit pattern from each of the ECC symbols and the pseudo-redundancy symbols, to produce a data code word that has symbols that are elements of GF(2.sup.m). To decode the data code word, the decoder fills in the i-bit pattern in each of the data code word symbols and decodes the code word, treating the first R of the modified ECC symbols as code word data, or information, symbols, and the remaining modified ECC symbols and the pseudo redundancy symbols as code word ECC symbols. The system determines for the encoder the generator polynomial, g(x), and the modifying code words by determining a g(x)=(x+.alpha..sup.L)*(x+.alpha..sup.L+1) . . . *(x+.alpha..sup.L+d-2) with L=1, 2, . . . that produces i*(d-1) modifying code words that have only one selected bit of the i-bit pattern set to a one.

Abstract translation: 纠错系统包括编码器，其使用经修改的里德 - 所罗门码对GF（2m + i）上的m位数据符号进行编码，并形成具有d-1（m + i）位ECC符号的初步码。 然后，编码器通过组合初步码字与一个或多个修改码字的组合来修改ECC符号，以产生具有以预先选择的模式设置的i位的修改的ECC符号。 这种组合还导致包括附加到修改的ECC符号的i位模式的“R”伪冗余符号。 编码器从每个ECC符号和伪冗余符号截断i位模式，以产生具有作为GF（2m）的元素的符号的数据码字。 为了对数据码字进行解码，解码器填充每个数据码字符号中的i位模式并解码码字，将经修改的ECC符号的第一个R作为码字数据或信息，符号和 剩余的修改的ECC符号和伪冗余符号作为码字ECC符号。 该系统通过确定g（x）=（x +αL）*（x +αL+ 1）来确定编码器生成多项式g（x）和修改代码字。 。 。 *（x +αL+ d-2），L = 1,2。 。 。 这产生i *（d-1）修改只有一个i位模式的一个选定位被设置为一个的代码字。

公开(公告)号：US5761102A

公开(公告)日：1998-06-02

申请号：US580294

申请日：1995-12-28

Applicant: Lih-Jyh Weng

Inventor： Lih-Jyh Weng

IPC: G06F7/72 ,  G06F7/00 ,  G06F15/00

CPC classification number: G06F7/724

Abstract: A system for determining a cubic root of an element .alpha..sup.3k of a Galois Field GF(2.sup.2m) raises the element .alpha..sup.3k to the 2.sup.m +1 power if m is even or to the 2.sup.m -1 power if m is odd. Next the system uses a small look-up table to determine the cube root of .alpha..sup.3k(2.spsp.m.sup..+-.1). The system then multiplies this cube root .alpha..sup.k(2.spsp.m.sup..+-.1) by .alpha..sup.3k raised to the ##EQU1## power, to produce ..alpha..sup.k(2.spsp.m.sup.+1)..alpha..sup.k(2.spsp.m.sup.-1) =.alpha..sup.k(2.spsp.m+1.sup.). The system then raises the result to the ##EQU2## power, to produce the cube root .alpha..sup.k. Since not all elements of GF(2.sup.2m) have cube roots within the field, the system tests the result by multiplying it by itself twice, to determine if the product is .alpha..sup.3k.

Abstract translation: 如果m是奇数，则用于确定伽罗瓦域GF（22m）的元素α3k的立方根的系统将元素α3k提升为2m + 1功率，如果m是偶数或2m-1​​功率。 接下来，系统使用一个小型查找表来确定alpha 3k（2m +/- 1）的立方根。 然后，系统将该立方根αk（2m +/- 1）乘以α3k升至功率，以产生。 αk（2m + 1）。 αk（2m-1）=αk（2m + 1）。 然后，系统将结果提高到权力，以产生立方根αk。 由于并非GF（22m）的所有元素都有立方体根，所以系统通过将其乘以两次来测试结果，以确定产品是否为alpha 3k。

公开(公告)号：US5574448A

公开(公告)日：1996-11-12

申请号：US436980

申请日：1995-05-08

Applicant: Lih-Jyh Weng ,  John DeRoo ,  Michael Leis

Inventor： Lih-Jyh Weng ,  John DeRoo ,  Michael Leis

IPC: H03M7/14 ,  G06T9/00 ,  G11B20/14 ,  H03M5/14 ,  H03M13/00 ,  H03M13/31 ,  H03M7/46

CPC classification number: H03M5/145 ,  G06T9/005 ,  G11B20/1426 ,  H03M13/31

Abstract: An encoding system uses a modified 8/9 rate modulation code to encode 8-bit data symbols into 9-bit cells in a conventional manner in accordance with the modified code and 9-bit ECC symbols into 10-bit cells by (i) encoding 8 bits of the symbol into a 9-bit cell in accordance with the modified code, and (ii) inserting into the 9-bit cell the remaining, that is, the non-encoded, bit of the ECC symbol. The system reproduces the 8-bit data symbols by decoding the 9-bit cells in a conventional manner in accordance with the modified code, and the 9-bit ECC symbols by (i) removing from the associated 10-bit cell the bit inserted during encoding, (ii) decoding the remaining 9 bits to reproduce 8 bits of the symbol, and (iii) inserting into the 8 bits the bit that was earlier removed. In an exemplary embodiment, the 8 least significant bits of the ECC symbol are encoded using the modified 8/9 rate code. The 9 bits produced by the code are used essentially as the first "c" bits and last "10-c" bits of a 10-bit cell. The most significant bit of the ECC symbol is included in the cell as the c+1.sup.st bit. The mapping of 8 bits to 9-bit cells is such that the inclusion of this c+1.sup.st bit does not violate the code's run length limitations, either within the cell or within a modulation code word, which is a concatenation of the cells. The system can similarly encode, using a modified n/m rate code, n-bit and (n+i)-bit symbols, where (n+i)

Abstract translation: 编码系统使用经修改的8/9速率调制码，以常规方式将8位数据符号根据经修改的代码和9位ECC符号编码为10比特单元，通过（i）编码 根据修改后的代码将符号的8位变换为9位单元，并且（ii）将9位单元中剩余的，即ECC符号的未编码位插入。 该系统通过根据修改的代码以常规方式对9位单元进行解码来再现8位数据符号，并且通过（i）从相关联的10位单元中删除插入的位的9位ECC符号来再现8位数据符号 编码，（ii）对剩余的9位进行解码以再现该符号的8位，以及（iii）在8位中插入较早去除的位。 在示例性实施例中，使用修改的8/9速率码对ECC符号的8个最低有效位进行编码。 由代码产生的9位实质上用作10位单元的第一个“c”位和最后一个“10-c”位。 ECC符号的最高有效位作为c + 1位包含在单元格中。 8位到9位单元的映射使得这个c + 1位的包含不会在单元内或在调制码字内，即单元格的级联中违反代码的运行长度限制。 该系统可以使用修正的n / m速率码，分别编码n位和（n + i）位符号，其中（n + i）

公开(公告)号：USRE34003E

公开(公告)日：1992-07-21

申请号：US592908

申请日：1990-10-04

Applicant: Lih-Jyh Weng

Inventor： Lih-Jyh Weng

IPC: G11B20/12 ,  G11B20/18 ,  G11B27/30

CPC classification number: G11B20/1252 ,  G11B20/1833 ,  G11B27/3027 ,  G11B2220/2508

Abstract: Addresses corresponding to magnetic disk sectors are encoded using an error correction code (ECC), such that addresses which are in a neighborhood, that is, addresses which are mathematically or numerically close, are mapped to addresses which differ in at least D-1 bits where the ECC is a distance D code. An original n-bit sector address is separated into two segments. One segment is a "k"-bit neighborhood address segment containing the k lower order address bits identifying the location of the selected sector within a neighborhood. The second segment is an "n-k" bit higher order address segment identifying the neighborhood containing the selected sector. The k-bit neighborhood address segment is then encoded with an (n,k) distance D linear code to form an n-bit preliminary code word containing n-k redundancy (ECC) bits appended, as the most significant bits, to the k neighborhood address bits. The (n-k)-bit higher order address segment is encoded by representing the segment in Gray code. The (n-k)-bit Gray coded segment is added modulo 2 to the n-k redundancy (ECC) bits of the preliminary code word. The resulting n-bit address code word is recorded on the disk as the sector address. When a particular sector is to be accessed, the address is first encoded in the manner set forth above, and the read/write head is moved to the logical neighborhood containing the sector. The encoded address is then compared to the addresses written in the various sectors in the neighborhood. When a match within (D-2)/2 bits is found, the sector is identified as the correct sector.

公开(公告)号：US5107506A

公开(公告)日：1992-04-21

申请号：US469924

申请日：1990-01-25

Applicant: Lih-Jyh Weng ,  Bruce A. Leshay

Inventor： Lih-Jyh Weng ,  Bruce A. Leshay

IPC: H03M13/15

CPC classification number: H03M13/15

Abstract: An error correction system generates a residue for data symbols encoded in accordance with an (n,k) code which has a distance "d" and a generator polynomial g(x). If the residue contains fewer than "T" non-zero symbols, where T

公开(公告)号：US5107503A

公开(公告)日：1992-04-21

申请号：US470423

申请日：1990-01-25

Applicant: C. Michael Riggle ,  Lih-Jyh Weng ,  Pak N. Hui

Inventor： C. Michael Riggle ,  Lih-Jyh Weng ,  Pak N. Hui

IPC: H03M13/15

CPC classification number: H03M13/151

Abstract: A pipelined error correction circuit iteratively determines syndromes, error locator and evaluator equations, and error locations and associated error values for received Reed-Solomon code words. The circuit includes a plurality of Galois Field multiplying circuits which use a minimum number of circiut elements to generate first and second products. Each Galois Field multiplying circuit includes a first GF multiplier which multiplies one of two input signals in each of two time intervals by a first value to produce a first product. The circuit includes a second GF multiplier which further multiplies one of the first products by a second value to generate a second product. The first and second products are then applied to the first GF multiplier as next input signals. The multiplying circuit minimizes the elements required to generate two products by using a first, relatively complex multiplier for both the first and second products and then a second relatively simple multiplier to generate the second product. This simplifies the multiplying circuit which would otherwise require two relatively complex multipliers. The error correction circuit determines, for each received code word, an error locator equation by iteratively updating a preliminary error locator equation. The circuit determines for a given iteration whether or not to update the preliminary error locator equation by comparing a particular variable with zero.

Abstract translation: 流水线误差校正电路迭代地确定接收的Reed-Solomon码字的校正子，误差定位器和评估器方程，以及误差位置和相关联的误差值。 该电路包括使用最少数量的循环元件来产生第一和第二乘积的多个伽罗瓦域乘法电路。 每个伽罗瓦域乘法电路包括第一GF乘法器，其将两个时间间隔中的每一个中的两个输入信号之一乘以第一值以产生第一乘积。 电路包括第二GF乘法器，其进一步将第一乘积之一乘以第二值以产生第二乘积。 然后将第一和第二产品作为下一个输入信号应用于第一GF乘法器。 乘法电路通过使用用于第一和第二乘积的第一相对复杂的乘法器然后再生成第二个相对简单的乘法器来产生第二乘积，从而最小化生成两个乘积所需的元件。 这简化了乘法电路，否则将需要两个相对复杂的乘法器。 错误校正电路通过迭代地更新初步误差定位器方程来确定每个接收到的代码字的误差定位器方程。 电路通过将特定变量与零比较来确定给定迭代是否更新初步误差定位器方程。

公开(公告)号：US5001715A

公开(公告)日：1991-03-19

申请号：US550802

申请日：1990-07-09

Applicant: Lih-Jyh Weng

Inventor： Lih-Jyh Weng

IPC: H03M13/03 ,  H03M13/15

CPC classification number: H03M13/151 ,  H03M13/033

Abstract: The invention is an error correcting system which calculates the error locations, that is, finds the roots of the error locator equation:1+.delta..sub.1 *x+.delta..sub.2 *x.sup.2 +.delta..sub.3 x.sup.3 + . . . +.delta..sub.v-1 *x.sup.v-1 +.delta..sub.v *x.sup.v =0 (1)where "+" and "*" represent Galois Field addition and Galois Field multiplication, respectively, and "v" is the number of errors in the data by substituting the error location equation coefficients into a succession of v error location formulas along with successive values of x to determine if the various x's are roots of equation (1). When the first root is found, extraction of the root corresponds to reducing the degree of equation (1) by one, to (v-1), and also to reducing the number of error location formulas by one to (v-1). Thus substitution in the error location formulas of further values of x to find the next root requires one fewer addition operation and one fewer multiplication operation. When another root is found, the error location formulas are further reduced by one. This procedure is repeated until, depending on the system utilized, all v roots are found or v is reduced to a value of 2, 3 or 4, and a fast-decoding method is utilized to find the remaining roots.

Abstract translation: 本发明是一种错误校正系统，其计算误差位置，即找出误差定位器方程的根：1+ delta 1 * x + delta 2 * x2 + delta 3x3 +。 。 。 + delta v-1 * xv-1 + delta v * xv = 0（1）其中“+”和“*”分别表示伽罗瓦域加法和伽罗瓦域乘法，“v”是数据中的错误数 通过将误差位置方程系数代入一系列v个误差位置公式以及x的连续值，以确定各个x是否是等式（1）的根。 当找到第一个根时，根的提取对应于将等式（1）的程度减少一个到（v-1），并且还将误差位置公式的数量减少一个到（v-1）。 因此，在x的另外的值的错误位置公式中替换以找到下一个根，需要少一个加法运算和一个较少的乘法运算。 当找到另一个根时，错误位置公式进一步减少一个。 重复该过程，直到根据所使用的系统，找到所有v根或v减少到2,3或4的值，并且使用快速解码方法来找到剩余的根。

公开(公告)号：US4975867A

公开(公告)日：1990-12-04

申请号：US67712

申请日：1987-06-26

Applicant: Lih-Jyh Weng

Inventor： Lih-Jyh Weng

IPC: G06F11/10 ,  G06F7/72 ,  H03M13/00 ,  H03M13/15

CPC classification number: H03M13/15 ,  G06F7/726 ,  G06F2207/7209

Abstract: The invention is an apparatus and/or method which enables one to divide two elements, A and B, of GF(2.sup.2M), that is, perform the operation B/A, by finding the multiplicative inverse of the divisor A, and then multiplying the inverse by the numerator, B. The multiplicative inverse, A.sup.-1, of A is found by computing a conversion factor, D, and then multiplying A by D to convert it to an element C, where C is also an element of a smaller Galois Field, GF(2.sup.M), which is a subfield of GF(2.sup.2M). Specifically, C is equal to A.sup.2.spsp.M.sbsp.+1), or A.sup.2.spsp.M *A, in the field GF(2.sup.2M). Next, the multiplicative inverse, C.sup.-1, of C in GF(2.sup.M) is found by appropriately entering a stored look-up table containing the 2.sup.M elements of GF(2.sup.M).The multiplicative inverse, C.sup.-1, of C is thereafter converted, by multiplying it by the conversion factor D calculated above, to the element of GF(2.sup.2M) which is the multiplicative inverse, A.sup.-1, of the original divisor, A. The multiplicative inverse, A.sup.-1, of A is then multiplied by B to calculate the quotient, B/A.

Abstract translation: 本发明是一种能够将GF（22M）的两个元素A和B分开的装置和/或方法，即通过求出除数A的乘法逆，然后乘法运算，执行操作B / A 由分子B反演。通过计算转换因子D找到A的乘法逆A-1，然后将A乘以D，将其转换为元素C，其中C也是 GF（2M）的GF（2M），GF（22M）的子场。 具体地说，在场GF（22M）中，C等于A2M + 1）或A2M * A。 接下来，通过适当地输入包含GF（2M）的2M个元素的存储的查找表，找到GF（2M）中的C的乘法逆C-1。 然后，通过将上述计算的转换因子D乘以作为原始除数的乘法反相（A-1）的GF（22M）的元素，将C的乘法逆C-1转换为A. 然后将A的乘法逆A-1乘以B以计算商B / A。

公开(公告)号：US4881075A

公开(公告)日：1989-11-14

申请号：US108892

申请日：1987-10-15

Applicant: Lih-Jyh Weng

Inventor： Lih-Jyh Weng

IPC: G06T9/00 ,  H03M7/30

CPC classification number: G06T9/005 ,  H03M7/3088

Abstract: Data compression/decompression apparatus and methods are provided which exhibit significant data compression improvement over prior art methods and apparatus. This is achieved by providing an adaptive characteristic in which a pair of data compression/decompression translation tables are constructed based on the data which is to be compressed or decompressed. One table is used to compress or decompress while the other is being rebuilt, thus reflecting the characteristics of the most recent input data.

Abstract translation: 提供了数据压缩/解压缩装置和方法，其显示出比现有技术方法和装置显着的数据压缩改进。 这通过提供一种基于要压缩或解压缩的数据来构造一对数据压缩/解压缩转换表的自适应特性来实现。 一个表用于压缩或解压缩，而另一个表被重建，从而反映最近输入数据的特征。

公开(公告)号：US07181677B1

公开(公告)日：2007-02-20

申请号：US10465266

申请日：2003-06-19

Applicant: Lih-Jyh Weng

Inventor： Lih-Jyh Weng

IPC: H03M13/00

CPC classification number: H03M13/1515 ,  H03M13/155 ,  H03M13/6343

Abstract: An encoding system manipulates L m-bit data symbols or sequences in accordance with a “restricted-symbol” code to produce code words that include error correction code (ECC) redundancy information and also meet modulation requirements, such as run length. The system combines the data and associated redundancy information of a code word D of the underlying code and one or more predetermined symbols or sequences that are appended to the data code word with the corresponding symbols or bit sequences of a selected code word F, to produce a transmission code word C that consists of symbols or sequences that meet the modulation requirements. Thereafter, the system corrects any errors in the retrieved or received code word C using the included redundancy information and the L m-bit data symbols or sequences are then recovered by removing therefrom the contributions of the code word F. The system may instead use the restricted-symbol code strictly as a data code, by combining the respective m-bit data symbols or sequences and one or more predetermined symbols with one or more selected m-bit symbols or sequences, to produce L+1 m-bit symbols or sequences that meet the modulation requirements. The predetermined symbols or sequences are appended to the data to aid in decoding, with the corresponding symbols in the encoded code word or data symbols or sequences indicating to a decoder which selected code word, symbols or sequences have been combined with the data.

Abstract translation: 编码系统根据“限制符号”代码操纵L m位数据符号或序列，以产生包括纠错码（ECC）冗余信息的码字，并且还满足诸如游程长度的调制要求。 该系统将底层代码的代码字D的数据和相关冗余信息与附加到数据代码字的一个或多个预定符号或序列与所选代码字F的相应符号或位序列相组合，以产生 由满足调制要求的符号或序列组成的传输码字C。 此后，系统使用所附的冗余信息来校正所检索或接收的码字C中的任何错误，然后通过从其中删除码字F的贡献来恢复L m位数据符号或序列。系统可以改为使用 通过将各个m位数据符号或序列以及一个或多个预定符号与一个或多个所选择的m位符号或序列组合来产生L + 1个m位符号或序列，严格地作为数据码的限制符号码 满足调制要求。 将预定的符号或序列附加到数据以帮助解码，将编码的码字或数据符号中的对应符号或向编码器指示所选择的码字，符号或序列已经与数据组合的解码器。