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41.发明申请公开(公告)号：US20220291538A1
公开(公告)日：2022-09-15
申请号：US17770280
申请日：2021-04-14
Inventor： Yanyong SONG , Yanfeng LI , Haoyi XIN , Xu QIAO , Chenrong QIAO , Wei REN , Yu XING , Jingjing XU , Rula SHA , Guolei ZHI , Guangshuai WANG , Liwen XIN , Jingwei HOU
IPC: G02F1/1339 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G02F1/1333 , G02F1/1335
Abstract: An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.
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42.发明授权公开(公告)号：US11411072B2
公开(公告)日：2022-08-09
申请号：US16648421
申请日：2019-04-25
Inventor： Huafeng Liu , Shengwei Zhao , Chaochao Sun , Chao Wang , Jingping Lv , Lin Xie , Guoqing Zhou , Panpan Zhang , Tengfei Wang , Hsinghua Pan , Lele Li , Zhiqiang Chang , Shaocong Dang , Shijie Mu , Zhen Wang
IPC: H01L49/02 , G02F1/1343 , G02F1/1362 , H01L27/12 , G02F1/1368
Abstract: Disclosed are a display substrate, a display device, a manufacturing method and a repairing method. A capacitor structure in the display substrate includes a first electrode and a second electrode. The first electrode includes a first main body portion extending in a first direction, first branch portions extending in a second direction, and a first connection portion connecting the first branch portions to the first main body portion. The second electrode includes a second main body portion extending in the first direction, second branch portions extending in the second direction, and a second connection portion connecting the second branch portions to the second main body portion. One side of the first electrode having the first branch portions faces one side of the second electrode having the second branch portions, and each first branch portion and a corresponding second branch portion form a capacitor.
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43.发明授权公开(公告)号：US11380255B2
公开(公告)日：2022-07-05
申请号：US16474398
申请日：2018-12-07
Inventor： Chang Zhang , Tairong Kim , Shanfu Jiang
IPC: G09G3/3233
Abstract: An optical compensation method for a display panel, an optical compensation device for a display panel, a display method for a display panel, a display device, and a storage medium are disclosed. The optical compensation method for a display panel includes: acquiring a pre-stored compensation parameter of the display panel; acquiring a current brightness level of the display panel; adjusting the pre-stored compensation parameter based on the current brightness level to obtain an adjusted compensation parameter; and compensating a display data signal of the display panel based on the adjusted compensation parameter.
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公开(公告)号：US20220187665A1
公开(公告)日：2022-06-16
申请号：US17485297
申请日：2021-09-24
Inventor： Zhenhong XIAO , Peng LIU , Chao LIANG , Aiyu DING , Yongqiang ZHANG , Jingyi XU , Hui YUAN , Jiantao LIU
IPC: G02F1/1362 , H01L27/12 , G02F1/1345 , G02F1/1333 , G06F3/041
Abstract: The present disclosure provides an array substrate and a display panel. The array substrate includes a base substrate and at least one signal line unit in a fan-out region of the base substrate. Each of the at least one signal line unit includes two first signal lines and one second signal line, and the two first signal lines and the one second signal line are respectively in different layers and extend in a same direction. A center line of an orthographic projection of the one second signal line on the base substrate overlaps with a center line of an orthographic projection of an interval region between the two first signal lines.
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公开(公告)号：US11360361B2
公开(公告)日：2022-06-14
申请号：US16957343
申请日：2019-12-25
Inventor： Dan Jia
IPC: G02F1/1362 , H01L21/66 , H01L23/60 , H01L27/12
Abstract: An array substrate motherboard includes a plurality of array substrates and a plurality of connection lines. Each of the plurality of array substrates includes an electrical test region, and the electrical test region includes a first conductive terminal. The plurality of connection lines are electrically connected to first conductive terminals of electrical test regions of the plurality of array substrates to electrically connect the plurality of array substrates together.
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Patent Agency Ranking
46.发明申请公开(公告)号：US20220173050A1
公开(公告)日：2022-06-02
申请号：US17483822
申请日：2021-09-24
Inventor： Lei YAO , Feng LI , Lei YAN , Kai LI , Chenglong WANG , Teng YE , Lin HOU , Xiaofang LI
IPC: H01L23/544 , H01L27/12
Abstract: Provided are a display substrate motherboard and manufacturing method thereof, a display substrate and a display apparatus. The display substrate motherboard includes a substrate, a display substrate area on the substrate, and a mark area on the periphery of the display substrate area. The display substrate motherboard also includes a thin film transistor disposed in the display substrate area, a mark structure disposed in the mark area and a planarization layer disposed on one side of the thin film transistor away from the substrate, and the planarization layer includes a groove which is disposed at the corresponding position of the mark structure and extends along a direction close to the substrate, and an orthographic projection of the groove on the substrate covers an orthographic projection of the mark structure on the substrate.
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公开(公告)号：US20220172654A1
公开(公告)日：2022-06-02
申请号：US17531247
申请日：2021-11-19
Inventor： Qianqian ZHANG , Liangliang LIU , Liman PENG , Zhiyong XUE , Le GAO
IPC: G09G3/00
Abstract: A display panel, a method for detecting a display panel and an electronic device are provided. a display panel are provided, including a display area and a peripheral region surrounding the display area; a plurality of bonding pads in the peripheral region; a lighting pad in the peripheral region; a plurality of source signal lines at least in the display region; a plurality of source signal line leads in the peripheral region and electrically connected to the plurality of source signal lines and electrically connected to the plurality of bonding pads; a plurality of sub-pixel columns in the display region and electrically connected to the plurality of source signal lines; and a detection circuit, arranged in the peripheral region and between the plurality of binding pads and the display area.
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48.发明授权公开(公告)号：US11342460B2
公开(公告)日：2022-05-24
申请号：US16601991
申请日：2019-10-15
Inventor： Zhixuan Guo , Fengguo Wang , Yezhou Fang , Xinguo Wu , Hong Liu , Kai Li , Liang Tian , Shiyu Zhang
IPC: H01L29/786 , H01L29/66
Abstract: A thin film transistor, a method for fabricating the same, an array substrate, a display panel, and a display device are provided. The thin film transistor includes a substrate, and an active layer on the substrate, wherein the active layer includes a poly-silicon layer and has a channel region and two electrode connection regions respectively on two sides of the channel region, and the channel region includes a plurality of lightly drain doping segments, which are spaced apart along from one of the electrode connection regions to the other electrode connection region, and channel segments located between the lightly drain doping segments.
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49.发明授权公开(公告)号：US11302277B2
公开(公告)日：2022-04-12
申请号：US16345354
申请日：2018-08-21
Inventor： Fei Huang
IPC: G09G3/3266 , G09G3/36 , G11C19/28
Abstract: A shift register unit and a driving method thereof, a gate driving circuit and a display apparatus are provided. The shift register unit comprises: an input circuit, a transmission circuit and an output control circuit; wherein the transmission circuit is coupled to a first node, a second node, a clock signal terminal and a first power source terminal, respectively, and is configured to control an electric potential of the second node under the control of the first node, the clock signal terminal and the first power source terminal, and the output control circuit is configured to control an electric potential of the output signal terminal under the control of the second node. The electric potential of the output signal from the output signal terminal in the shift register unit can be controlled by adopting one clock signal terminal, which effectively reduces the power consumption of the shift register unit.
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50.发明申请公开(公告)号：US20220100028A1
公开(公告)日：2022-03-31
申请号：US17228811
申请日：2021-04-13
Inventor： Hong Liu , Jingyi Xu , Peng Liu , Yongqiang Zhang , Bo Li , Peirong Huo
IPC: G02F1/1335
Abstract: Provided is a black matrix structure including a plurality of crossed black matrix strips. A side surface of the black matrix strip has a roughness less than 2 μm and is intersected with a reference plane. The reference plane being parallel to a plane defined by crossing of the plurality of black matrix strips.
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