公开(公告)号：US10114644B2

公开(公告)日：2018-10-30

申请号：US15220338

申请日：2016-07-26

Applicant: STMicroelectronics (Beijing) R&D Co. Ltd

Inventor： PengFei Zhu ,  Xiao Kang Jiao

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/32

Abstract: A decoding logic method is arranged to execute a zero-overhead loop in an embedded digital signal processor (DSP). In the method, instruction data is fetched from a memory, and a plurality of instruction tokens, which are derived from the instruction data, are stored in a token buffer. A first portion of one or more instruction tokens from the token buffer are passed to a first decode module, which may be an instruction decode module, and a second portion of the one or more instruction tokens from the token buffer are passed to a second decode module, which may be a loop decode module. The second decode module detects a special loop instruction token, and based on the detection of the special loop instruction token, a loop counter is conditionally tested. Using the first decode module, at least one instruction token of an iterative algorithm is assembled into a single instruction, which is executable in a single execution cycle. Based on the conditional test of the loop counter, the first decode module further assembles a loop branch instruction of the iterative algorithm into the single instruction executable in one execution cycle.

公开(公告)号：US09977445B2

公开(公告)日：2018-05-22

申请号：US15051406

申请日：2016-02-23

Applicant: STMicroelectronics (Beijing) R&D Co. Ltd

Inventor： Zhenghao Cui

IPC: G05F1/565 ,  G05F1/575 ,  H02M1/00

CPC classification number: G05F1/575 ,  H02M3/156 ,  H02M2001/0032 ,  H02M2001/0045

Abstract: An electronic device disclosed herein includes a linear output stage configured to generate an output voltage to an output node as a function of an input voltage, and a buck output stage configured to generate the output voltage to the output node as a function of the input voltage. Control circuitry is configured to enable the linear output stage and disable the buck output stage if a current demanded by a load to maintain the output voltage at a desired level is less than a limit current, and enable the buck output stage and disable the linear output stage a delay period of time after enabling the buck output stage, if the current demanded by the load to maintain the output voltage at the desired level is greater than the limit current.