Power-splitter-based virtual array
    41.
    发明授权

    公开(公告)号:US11435467B2

    公开(公告)日:2022-09-06

    申请号:US16583564

    申请日:2019-09-26

    Applicant: Apple Inc.

    Abstract: During operation, a transmitter in an electronic device may provide, to a transmission path, an electrical signal. This electrical signal may be divided by the power splitter into a first output electrical signal in a first output transmission path and a second output electrical signal in a second output transmission path, which may result in transmitting of the first wireless signal and the second wireless signal by antennas. Because the second output transmission path may include a delay element that provides a delay, the second wireless signal may be delayed relative to the first wireless signal. Moreover, N radar receivers in the electronic device may receive first wireless-return signals corresponding to the first wireless signal and second wireless-return signals corresponding to the second wireless signal. These wireless-return signals may be combined to create a virtual array MIMO radar having an antenna aperture size of 2N.

    Power-Splitter-Based Virtual Array
    42.
    发明申请

    公开(公告)号:US20210096233A1

    公开(公告)日:2021-04-01

    申请号:US16583564

    申请日:2019-09-26

    Applicant: Apple Inc.

    Abstract: During operation, a transmitter in an electronic device may provide, to a transmission path, an electrical signal. This electrical signal may be divided by the power splitter into a first output electrical signal in a first output transmission path and a second output electrical signal in a second output transmission path, which may result in transmitting of the first wireless signal and the second wireless signal by antennas. Because the second output transmission path may include a delay element that provides a delay, the second wireless signal may be delayed relative to the first wireless signal. Moreover, N radar receivers in the electronic device may receive first wireless-return signals corresponding to the first wireless signal and second wireless-return signals corresponding to the second wireless signal. These wireless-return signals may be combined to create a virtual array MIMO radar having an antenna aperture size of 2N.

    Low power display on mode for a display device

    公开(公告)号:US10943557B2

    公开(公告)日:2021-03-09

    申请号:US16384716

    申请日:2019-04-15

    Applicant: Apple Inc.

    Abstract: Systems, methods, and apparatus to transition a display device between operating modes using a single dedicated pin of a circuit connected to the display device. The dedicated pin can receive a packet signal corresponding to an operating mode for the display device, and the circuit can thereafter cause the display device to transition into the desired operating mode in response to receiving the packet signal. The operating mode can be a low power on mode where an interface connected to the circuit is deactivated and at least some circuitry of the display device is throttled or powered off. The display device can be driven in an all black state while in the low power on mode, thereby allowing the display device to more quickly transition out of the low power on mode compared to when the display device is completely off.

    Controlling emission rates in digital displays

    公开(公告)号:US10923016B2

    公开(公告)日:2021-02-16

    申请号:US16334698

    申请日:2017-09-13

    Applicant: Apple Inc.

    Abstract: A display device may include pixels that display image data. The display device may also include a circuit that receives pixel data having a gray level for at least one pixel, such that the pixel data corresponds to a frame of the image data and the frame includes sub-frames. The pixel data causes the circuit to provide at least one current pulse to the at least one pixel according to a first order of the sub-frames. The circuit may also receive a second order of the sub-frames, such that the second order is mapped with respect to the first order, and at least one current pulse is provided to the at least one pixel according to the second order. As such, visual artifacts depicted on the display are reduced.

    Electronic display emission scanning

    公开(公告)号:US10777116B1

    公开(公告)日:2020-09-15

    申请号:US15251906

    申请日:2016-08-30

    Applicant: Apple Inc.

    Abstract: An electronic display includes a timing controller configured to distribute emission periods throughout an active area of the display over time by generating a plurality of emission clock phases. The electronic display also includes multiple row drivers configured to cause rows of pixels to emit at multiple different emission periods.

    Time-interleaved source driver for display devices

    公开(公告)号:US10438535B2

    公开(公告)日:2019-10-08

    申请号:US15697172

    申请日:2017-09-06

    Applicant: Apple Inc.

    Abstract: A display device may include a plurality of pixels that display image data on a display, a digital-to-analog converter that outputs a voltage that corresponds to a luminance value to be depicted on a first pixel, and a circuit that amplifies the voltage and outputs an amplified voltage to the first pixel. The circuit may include a capacitor that receives the voltage via the digital-to-analog converter and an amplifier coupled to the capacitor. The amplifier generates the amplified voltage based on the voltage stored the capacitor. The circuit also include switches that couple a first terminal of the capacitor to an output of the amplifier during a first amount of time and couples a second terminal of the capacitor to the output of the amplifier after the first amount of time expires.

    Digital architecture with merged non-linear emission clock signals for a display panel

    公开(公告)号:US10283037B1

    公开(公告)日:2019-05-07

    申请号:US15249283

    申请日:2016-08-26

    Applicant: Apple Inc.

    Abstract: Systems and apparatuses provide a digital architecture with merged non-linear emission clocks for a display panel. In one embodiment, a display driver hardware circuit includes decoder logic to store a mapping between a plurality of non-linear gray scale clock signals and a merged non-linear gray scale clock signal that represents a combination of the plurality of non-linear gray scale clock signals including first and second non-linear gray scale clock signals. In one example, the first non-linear gray scale clock signal is associated with at least one display element of a first color and the second non-linear gray scale clock signal is associated with at least one display element of a second color. A driver circuitry is coupled to the decoder logic. The driver circuitry includes a counter to store a number of pulses of the merged non-linear gray scale clock signal and driving circuitry to cause emission of the at least one display element of a first color based on the first non-linear gray scale clock signal.

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