公开(公告)号：US11893919B2

公开(公告)日：2024-02-06

申请号：US17765373

申请日：2021-06-10

Applicant: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Qiujie Su ,  Feng Qu ,  Zhihua Sun ,  Seungmin Lee ,  Yanping Liao ,  Hongli Yue

IPC: G11C19/28 ,  G09G3/20

CPC classification number: G09G3/20 ,  G11C19/28 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2330/021

Abstract: A gate driving circuit and a display panel are provided. The gate driving circuit includes M shift registers and N clock signal lines; every N adjacent shift registers among the M shift registers are respectively connected to the N clock signal lines, where N is an even number greater than or equal to 4, and M is an integer greater than or equal to N; a signal output terminal (OUTPUT) of an ith shift register is connected to a signal input terminal (INPUT) of a (i+p)th shift register, where (N−4)/2≤p≤N/2, and i is taken from 1 to (M−p); and a pull-up reset signal terminal of a jth shift register is connected to a signal output terminal (OUTPUT) of a (j+q)th shift register, where 1

公开(公告)号：US20230401987A1

公开(公告)日：2023-12-14

申请号：US18457637

申请日：2023-08-29

Applicant: Beijing BOE Display Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Qiujie Su ,  Zhihua Sun ,  Yingmeng Miao ,  Yinlong Zhang ,  Feng Qu ,  Seungmin Lee ,  Yanping Liao ,  Xibin Shao

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/20 ,  G11C19/28 ,  G09G2300/0408 ,  G09G2310/08 ,  G09G2310/0286

Abstract: A gate driving circuit is provided, including N-stages of cascaded shift registers divided into at least one group of K-stages in which a clock signal terminal of a k-th stage of shift register is connected to receive a k-th clock signal, where 1≤k≤K≤N; and an input signal terminal of a n-th stage is connected to an output signal terminal of a (n−i)-th stage, and reset signal terminals of the n-th and (n+1)-th stages are connected to an output signal terminal of a (n+j)-th stage, where 1

公开(公告)号：US10134350B2

公开(公告)日：2018-11-20

申请号：US15652493

申请日：2017-07-18

Applicant: BOE Technology Group Co., Ltd. ,  Beijing BOE Display Technology Co., Ltd.

Inventor： Qiujie Su

IPC: G09G3/36 ,  G11C19/28

Abstract: The embodiments of the present disclosure provide a shift register unit, a method for driving the shift register unit, a gate driving circuit and a display apparatus. The shift register unit comprises a first input module, a first output module, a first reset module, a first storage module and a second reset module. The first input module is configured to output a first pull-up signal to the first output module based on a first input signal. The first output module is configured to output an output signal based on the first pull-up signal and a first clock signal. The first storage module is configured to store the first pull-up signal. The first reset module is configured to reset the first storage module based on a first reset signal. The second reset module is configured to reset the output from the first output module based on a second reset signal. The second reset signal is set to be valid while the first pull-up signal and the first clock signal are valid and a duration in which the second reset signal is valid is shorter than a duration in which the first clock signal is valid.