公开(公告)号：US20090166627A1

公开(公告)日：2009-07-02

申请号：US12344438

申请日：2008-12-26

Applicant: Chang-Hun Han

Inventor： Chang-Hun Han

IPC: H01L31/02 ,  H01L31/0376 ,  H01L21/04

CPC classification number: H01L27/14634 ,  H01L27/14643 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An image sensor may include a first substrate having circuitry including wires and a silicon layer formed on and/or over the first substrate to selectively contact the wires. The image sensor may include photodiodes bonded to the first substrate while contacting the silicon layer and electrically connected to the wires. Each unit pixel may be implemented having complicated circuitry without a reduction in photosensitivity. Additional on-chip circuitry may also be implanted in the design.

Abstract translation: 图像传感器可以包括具有包括导线的电路的第一基板和形成在第一基板上和/或上方的硅层，以选择性地接触导线。 图像传感器可以包括在与硅层接触并且电连接到电线时结合到第一衬底的光电二极管。 可以实现每个单位像素具有复杂的电路而不降低光敏性。 还可以在设计中植入附加的片上电路。

公开(公告)号：US20060148176A1

公开(公告)日：2006-07-06

申请号：US11320687

申请日：2005-12-30

Applicant: Dong-Oog Kim ,  Chang-Hun Han

Inventor： Dong-Oog Kim ,  Chang-Hun Han

IPC: H01L21/336

CPC classification number: H01L27/115 ,  H01L27/11519 ,  H01L27/11521

Abstract: A method of manufacturing a gate in a flash memory device. The method includes forming a stacking structure including a tunnel oxide layer, a floating gate, a dielectric layer, and a control gate on a semiconductor substrate. The further includes removing a remaining portion of the tunnel oxide layer exposed by the control gate by wet etching to a degree that the semiconductor substrate is exposed, and forming an oxide layer covering the exposed portion of the semiconductor substrate and both sidewalls of the floating gate and the control gate.

Abstract translation: 一种在闪速存储器件中制造栅极的方法。 该方法包括在半导体衬底上形成包括隧道氧化物层，浮置栅极，电介质层和控制栅极的堆叠结构。 还包括通过湿蚀刻去除由控制栅极暴露的隧道氧化物层的剩余部分到半导体衬底暴露的程度，并且形成覆盖半导体衬底的暴露部分的氧化物层和浮置栅极的两个侧壁 和控制门。