Digital communications test system for multiple input, multiple output (MIMO) systems
    41.
    发明授权
    Digital communications test system for multiple input, multiple output (MIMO) systems 有权
    用于多输入多输出(MIMO)系统的数字通信测试系统

    公开(公告)号:US09035672B2

    公开(公告)日:2015-05-19

    申请号:US13358282

    申请日:2012-01-25

    摘要: A digital communications test system and method for testing a plurality of devices under test (DUTs) in which multiple sets of a single vector signal analyzer (VSA) and single vector signal generator (VSG) can be used together to perform error vector magnitude (EVM) measurements for one or more DUTs in parallel, including one or more of composite, switched and multiple input multiple output (MIMO) EVM measurements. This allows N pairs of a VSA and VSG to test N DUTs with N×N MIMO in substantially the sane time as a single VSA and VSG pair can test a single DUT, thereby allowing a substantial increase in testing throughput as compared to that possible with only a single VSA and VSG set.

    摘要翻译: 一种用于测试多个待测器件(DUT)的数字通信测试系统和方法,其中多组单向量信号分析器(VSA)和单矢量信号发生器(VSG)可以一起用于执行误差矢量幅度(EVM )测量,包括并行的一个或多个DUT,包括复合,交换和多输入多输出(MIMO)EVM测量中的一个或多个。 这允许N对VSA和VSG在基本上理想的时间内以N×N MIMO测试N个DUT,因为单个VSA和VSG对可以测试单个DUT,从而允许测试吞吐量大大增加, 只有一个VSA和VSG集合。

    System and method for initiating testing of multiple communication devices
    42.
    发明授权
    System and method for initiating testing of multiple communication devices 有权
    用于启动多个通信设备测试的系统和方法

    公开(公告)号:US08913504B2

    公开(公告)日:2014-12-16

    申请号:US13462459

    申请日:2012-05-02

    CPC分类号: H04L43/12 H04L43/50 H04W24/06

    摘要: A system and method for initiating testing of a plurality of communication devices. The tester and devices under test (DUTs) are first synchronized as a way of confirming test readiness on the part of the DUTs, Following that, a test sequence is initiated by the tester. The synchronization and test initiation can be accomplished using signals with differing signal magnitudes or device identifiers. The test sequence can be a DUT transmit signal test in which each DUT transmits data packets in accordance with one or more predefined test sequences. Alternatively, the test sequence can be a DUT receive signal test in which the tester transmits data packets to the DUTs with differing signal frequencies or signal magnitudes.

    摘要翻译: 一种用于发起对多个通信设备的测试的系统和方法。 测试器和被测器件(DUT)首先被同步,以确认被测部件的测试准备状态,之后测试程序由测试仪启动。 可以使用具有不同信号幅度或设备标识符的信号来实现同步和测试启动。 测试序列可以是DUT发射信号测试,其中每个DUT根据一个或多个预定义的测试序列传输数据分组。 或者,测试序列可以是DUT接收信号测试,其中测试仪向具有不同信号频率或信号幅度的DUT发送数据分组。

    System and method for simultaneous MIMO signal testing with single vector signal analyzer
    44.
    发明授权
    System and method for simultaneous MIMO signal testing with single vector signal analyzer 有权
    用单向量信号分析仪同时进行MIMO信号测试的系统和方法

    公开(公告)号:US08576947B2

    公开(公告)日:2013-11-05

    申请号:US13089945

    申请日:2011-04-19

    IPC分类号: H03C3/00

    CPC分类号: H04L1/24 H04B7/0413

    摘要: Signal conversion circuitry and method for converting a multiple input, multiple output (MIMO) packet data signal transmission to a plurality of complex data samples for processing by shared test equipment, e.g., a single vector signal analyzer (VSA).

    摘要翻译: 信号转换电路和用于将多输入多输出(MIMO)分组数据信号传输转换成多个复数数据样本的信号转换电路和方法,用于共享测试设备,例如单个矢量信号分析仪(VSA)的处理。

    SYSTEM AND METHOD FOR DETERMINISTIC TESTING OF PACKET ERROR RATE IN ELECTRONIC DEVICES
    46.
    发明申请
    SYSTEM AND METHOD FOR DETERMINISTIC TESTING OF PACKET ERROR RATE IN ELECTRONIC DEVICES 有权
    用于电子设备中分组错误率的确定测试的系统和方法

    公开(公告)号:US20130028100A1

    公开(公告)日:2013-01-31

    申请号:US13191154

    申请日:2011-07-26

    IPC分类号: H04W24/00 H04L12/26

    CPC分类号: H04L1/24 H04L1/203 H04W24/06

    摘要: A method and system for testing packet error rate in electronic devices by transmitting a series of data packets from a testing device to a device under test (DUT) and setting a predefined number of received error-free data packets; evaluating whether a number of data packets from the series of data packets received error-free by the DUT equals the predefined number of received error-free data packets and transmitting additional data packets from the testing device to the DUT, at a power level known to produce zero received-packet errors in a correctly operating DUT, if the number of data packets from the series of data packets received error-free by the DUT does not equal the predefined number of received error-free data packets. Additional possible embodiments include evaluating whether a total number of data packets from the series of data packets and the additional error-free-power-level data packets received error-free by the DUT equals the predefined number of received error-free data packets and transmitting a confirmation data packet to the testing device in response to reception by the DUT of the predefined number of received error-free data packets.

    摘要翻译: 一种用于通过从测试设备向被测设备(DUT)发送一系列数据分组并且设置预定数量的接收到的无错误数据分组来测试电子设备中的分组错误率的方法和系统; 评估所述DUT接收的所述一系列数据分组的数据分组是否等于所接收的无错误数据分组的预定数量,并以已知的功率级别从所述测试装置向所述DUT发送附加数据分组 如果由DUT接收到的无错误数据分组的数据分组的数量不等于接收到的无错误数据分组的预定数量,则在正确操作的DUT中产生零接收分组错误。 其他可能的实施例包括评估来自该系列数据分组的数据分组的总数和DUT接收到的无错误功率级数据分组是否等于接收到的无错误数据分组的预定数量,并且发送 响应于DUT接收到预定数量的接收的无错误数据分组,向测试设备发送确认数据分组。

    DIGITAL COMMUNICATIONS TEST SYSTEM FOR MULTIPLE INPUT, MULTIPLE OUTPUT (MIMO) SYSTEMS
    47.
    发明申请
    DIGITAL COMMUNICATIONS TEST SYSTEM FOR MULTIPLE INPUT, MULTIPLE OUTPUT (MIMO) SYSTEMS 有权
    用于多输入多输出(MIMO)系统的数字通信测试系统

    公开(公告)号:US20120121000A1

    公开(公告)日:2012-05-17

    申请号:US13358222

    申请日:2012-01-25

    IPC分类号: H04B17/00

    摘要: A digital communications test system and method for testing a plurality of devices under test (DUTs) in which multiple sets of a single vector signal analyzer (VSA) and single vector signal generator (VSG) can be used together to perform error vector magnitude (EVM) measurements for one or more DUTs in parallel, including one or more of composite, switched and multiple input multiple output (MIMO) EVM measurements. This allows N pairs of a VSA and VSG to test N DUTs with N×N MIMO in substantially the sane time as a single VSA and VSG pair can test a single DUT, thereby allowing a substantial increase in testing throughput as compared to that possible with only a single VSA and VSG set.

    摘要翻译: 一种用于测试多个待测器件(DUT)的数字通信测试系统和方法,其中多组单向量信号分析器(VSA)和单矢量信号发生器(VSG)可以一起用于执行误差矢量幅度(EVM )测量,包括并行的一个或多个DUT,包括复合,交换和多输入多输出(MIMO)EVM测量中的一个或多个。 这允许N对VSA和VSG在基本上理想的时间内以N×N MIMO测试N个DUT,因为单个VSA和VSG对可以测试单个DUT,从而允许测试吞吐量大大增加, 只有一个VSA和VSG集合。

    System for testing an embedded wireless transceiver
    48.
    发明授权
    System for testing an embedded wireless transceiver 有权
    用于测试嵌入式无线收发器的系统

    公开(公告)号:US08131223B2

    公开(公告)日:2012-03-06

    申请号:US11839814

    申请日:2007-08-16

    IPC分类号: H04B17/00

    CPC分类号: H04B17/0085 H04B17/29

    摘要: A test equipment for testing a wireless communication device includes a wireless transceiver, memory, and a controller. The wireless transceiver transmits a first and second series of packets. The wireless transceiver receives a power level indicator that is based on at least one of the first series of packets. The memory stores the power level indicator. The controller performs a signal strength test. More specifically, the controller controls the transceiver to transmit the first series of packets at a first power level. The controller stores the power level indicator in memory when the power level indicator is received by the transceiver. The controller controls the transceiver to transmit the second series of packets at a second power level.

    摘要翻译: 用于测试无线通信设备的测试设备包括无线收发器,存储器和控制器。 无线收发器发送第一和第二系列数据包。 无线收发器接收基于第一系列分组中的至少一个的功率电平指示符。 存储器存储功率电平指示器。 控制器执行信号强度测试。 更具体地,控制器控制收发器以第一功率电平发送第一系列分组。 当收发器接收到功率电平指示灯时,控制器将功率电平指示器存储在存储器中。 控制器控制收发器以第二功率电平传输第二系列数据包。

    Method for Testing Wireless Devices Using Predefined Test Segments Initiated by Over-The-Air Signal Characteristics
    49.
    发明申请
    Method for Testing Wireless Devices Using Predefined Test Segments Initiated by Over-The-Air Signal Characteristics 有权
    使用由空中信号特征引发的预定义测试段测试无线设备的方法

    公开(公告)号:US20120051224A1

    公开(公告)日:2012-03-01

    申请号:US12873399

    申请日:2010-09-01

    IPC分类号: H04J3/14

    CPC分类号: H04L12/2697 H04L43/50

    摘要: A method for testing a packet data signal transceiver via its packet data signal interface. The packet data signal interface is used to convey test packet data signals from the test equipment to the DUT, and response packet data signals responsive to such test packet data signals from the DUT to the test equipment.

    摘要翻译: 一种通过分组数据信号接口测试分组数据信号收发信机的方法。 分组数据信号接口用于将来自测试设备的测试分组数据信号传送到DUT,并且响应分组数据信号响应于来自DUT的测试分组数据信号到测试设备。

    System and Method for Using Multiple Network Addresses To Establish Synchronization of a Device Under Test and Test Equipment Controlling the Test
    50.
    发明申请
    System and Method for Using Multiple Network Addresses To Establish Synchronization of a Device Under Test and Test Equipment Controlling the Test 有权
    使用多个网络地址建立被测设备的同步和测试设备的系统和方法

    公开(公告)号:US20110292809A1

    公开(公告)日:2011-12-01

    申请号:US12791594

    申请日:2010-06-01

    IPC分类号: H04L12/26

    CPC分类号: H04L43/50

    摘要: A system and method for testing a data packet signal transceiver in which multiple network addresses (e.g., media access control, or MAC, addresses) are used to establish synchronization of the device under test and the test equipment controlling the test. In accordance with an exemplary embodiment, synchronization is established using a first MAC address, following which testing is conducted using a second MAC address.

    摘要翻译: 用于测试数据分组信号收发器的系统和方法,其中使用多个网络地址(例如,媒体访问控制或MAC地址)来建立被测设备的同步和控制测试的测试设备。 根据示例性实施例,使用第一MAC地址建立同步,随后使用第二MAC地址进行测试。