Method and system for processing commonality of semiconductor devices

    公开(公告)号:US20060247894A1

    公开(公告)日:2006-11-02

    申请号:US11286255

    申请日:2005-11-22

    CPC classification number: G05B15/02

    Abstract: A method and system for processing commonality of semiconductor devices. The method includes providing a first plurality of semiconductor devices, providing a second plurality of semiconductor devices, obtaining a first plurality of measured values corresponding to a characteristic associated with the first plurality of semiconductor devices, and obtaining a second plurality of measured values corresponding to the characteristic associated with the second plurality of semiconductor devices. Additionally, the method includes performing a first statistical analysis, determining a first statistical distribution, performing a second statistical analysis, and determining a second statistical distribution. Moreover, the method includes processing information associated with the first statistical distribution and the second statistical distribution, and determining an indicator. Also, the method includes processing information associated with the indicator, determining a confidence level, processing information associated with the confidence level, and determining whether the characteristic is stable.

    Method and system for processing commonality of semiconductor devices
    42.
    发明授权
    Method and system for processing commonality of semiconductor devices 有权
    用于处理半导体器件通用性的方法和系统

    公开(公告)号:US07003430B2

    公开(公告)日:2006-02-21

    申请号:US10882081

    申请日:2004-06-29

    CPC classification number: G05B15/02

    Abstract: A method and system for processing commonality of semiconductor devices. The method includes providing a first plurality of semiconductor devices, providing a second plurality of semiconductor devices, obtaining a first plurality of measured values corresponding to a characteristic associated with the first plurality of semiconductor devices, and obtaining a second plurality of measured values corresponding to the characteristic associated with the second plurality of semiconductor devices. Additionally, the method includes performing a first statistical analysis, determining a first statistical distribution, performing a second statistical analysis, and determining a second statistical distribution. Moreover, the method includes processing information associated with the first statistical distribution and the second statistical distribution, and determining an indicator. Also, the method includes processing information associated with the indicator, determining a confidence level, processing information associated with the confidence level, and determining whether the characteristic is stable.

    Abstract translation: 一种用于处理半导体器件的通用性的方法和系统。 该方法包括提供第一多个半导体器件,提供第二多个半导体器件,获得对应于与第一多个半导体器件相关联的特性的第一多个测量值,以及获得对应于第一多个半导体器件的第二多个测量值 特性与第二多个半导体器件相关联。 另外,该方法包括执行第一统计分析,确定第一统计分布,执行第二统计分析和确定第二统计分布。 此外,该方法包括处理与第一统计分布和第二统计分布相关联的信息,以及确定指标。 此外,该方法包括处理与指示符相关联的信息,确定置信水平,处理与置信水平相关联的信息,以及确定特征是否稳定。

    METHOD AND SYSTEM FOR PROCESSING COMMONALITY OF SEMICONDUCTOR DEVICES
    43.
    发明申请
    METHOD AND SYSTEM FOR PROCESSING COMMONALITY OF SEMICONDUCTOR DEVICES 有权
    用于处理半导体器件的共同性的方法和系统

    公开(公告)号:US20050278141A1

    公开(公告)日:2005-12-15

    申请号:US10882081

    申请日:2004-06-29

    CPC classification number: G05B15/02

    Abstract: A method and system for processing commonality of semiconductor devices. The method includes providing a first plurality of semiconductor devices, providing a second plurality of semiconductor devices, obtaining a first plurality of measured values corresponding to a characteristic associated with the first plurality of semiconductor devices, and obtaining a second plurality of measured values corresponding to the characteristic associated with the second plurality of semiconductor devices. Additionally, the method includes performing a first statistical analysis, determining a first statistical distribution, performing a second statistical analysis, and determining a second statistical distribution. Moreover, the method includes processing information associated with the first statistical distribution and the second statistical distribution, and determining an indicator. Also, the method includes processing information associated with the indicator, determining a confidence level, processing information associated with the confidence level, and determining whether the characteristic is stable.

    Abstract translation: 一种用于处理半导体器件的通用性的方法和系统。 该方法包括提供第一多个半导体器件,提供第二多个半导体器件,获得对应于与第一多个半导体器件相关联的特性的第一多个测量值,以及获得与第一多个半导体器件对应的第二多个测量值 特性与第二多个半导体器件相关联。 另外,该方法包括执行第一统计分析,确定第一统计分布,执行第二统计分析和确定第二统计分布。 此外,该方法包括处理与第一统计分布和第二统计分布相关联的信息,以及确定指标。 此外,该方法包括处理与指示符相关联的信息,确定置信水平,处理与置信水平相关联的信息,以及确定特征是否稳定。

    System for providing cell bus management in a switch platform including a write port cell count in each of a plurality of unidirectional FIFO for indicating which FIFO be able to accept more cell
    44.
    发明授权
    System for providing cell bus management in a switch platform including a write port cell count in each of a plurality of unidirectional FIFO for indicating which FIFO be able to accept more cell 失效
    用于在交换机平台中提供信元总线管理的系统,包括在多个单向FIFO中的每一个中的写入端口单元计数,用于指示哪个FIFO能够接受更多的单元

    公开(公告)号:US06463485B1

    公开(公告)日:2002-10-08

    申请号:US09089881

    申请日:1998-06-03

    Abstract: A method and apparatus for providing cell bus management in a switch platform are provided. Each unidirectional FIFO buffer of a cell bus controller outputs a write port cell count from a write port. A cell count value is programmed at which the write port cell count is outputted. When the write port cell count indicates that the FIFO buffer can not accept additional data or cells, a master bidirectional FIFO unit ceases reading cells to a unidirectional FIFO buffer of the slave bidirectional FIFO unit in response to the write port cell count. Furthermore, the master bidirectional FIFO unit disables a corresponding switch from routing cells to the slave bidirectional FIFO unit in response to the write port cell count; the switch routes the cells to another of the slave bidirectional FIFO units. The master bidirectional FIFO unit resumes reading cells to the second unidirectional FIFO buffer of the slave bidirectional FIFO unit in response to a write port cell count indication that the FIFO buffer can accept additional data or cells. In response, the master bidirectional FIFO unit enables an associated switch to route cells to the slave bidirectional FIFO unit.

    Abstract translation: 提供了一种用于在交换平台中提供信元总线管理的方法和装置。 单元总线控制器的每个单向FIFO缓冲器从写入端口输出写入端口单元计数。 编程单元计数值,输出写入端口单元计数。 当写入端口单元计数指示FIFO缓冲器不能接受附加数据或单元时,响应于写入端口单元计数,主双向FIFO单元停止将单元读取到从双向FIFO单元的单向FIFO缓冲器。 此外,主双向FIFO单元响应于写入端口单元计数禁用从路由单元到从双向FIFO单元的相应交换机; 交换机将单元路由到另一个从属双向FIFO单元。 响应于FIFO缓冲器可以接受附加数据或单元的写入口单元计数指示,主双向FIFO单元恢复读取单元到从双向FIFO单元的第二单向FIFO缓冲器。 作为响应,主双向FIFO单元使相关联的开关将单元路由到从属双向FIFO单元。

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