公开(公告)号：US09032141B2

公开(公告)日：2015-05-12

申请号：US13690523

申请日：2012-11-30

Applicant: Intel Corporation

Inventor： Kuljit S. Bains ,  John B. Halbert

IPC: G06F12/00 ,  G11C11/406 ,  G11C11/4078 ,  G11C11/408 ,  G11C29/50 ,  G06F13/16

CPC classification number: G11C11/40611 ,  G06F13/1636 ,  G11C7/24 ,  G11C11/4078 ,  G11C11/408 ,  G11C29/50 ,  G11C29/50012

Abstract: Detection logic of a memory subsystem obtains a threshold for a memory device that indicates a number of accesses within a time window that causes risk of data corruption on a physically adjacent row. The detection logic obtains the threshold from a register that stores configuration information for the memory device, and can be a register on the memory device itself and/or can be an entry of a configuration storage device of a memory module to which the memory device belongs. The detection logic determines whether a number of accesses to a row of the memory device exceeds the threshold. In response to detecting the number of accesses exceeds the threshold, the detection logic can generate a trigger to cause the memory device to perform a refresh targeted to a physically adjacent victim row.

Abstract translation: 存储器子系统的检测逻辑获得存储器设备的阈值，该存储器设备指示在时间窗口内的数量的访问，导致物理上相邻的行上的数据损坏风险。 检测逻辑从存储器件的配置信息的寄存器获得阈值，并且可以是存储器件本身的寄存器和/或可以是存储器件所属的存储器模块的配置存储设备的条目 。 检测逻辑确定对存储器件的行的访问次数是否超过阈值。 响应于检测到的访问次数超过阈值，检测逻辑可以产生触发以使存储器件执行针对物理上相邻的受害者行的刷新。