METHOD AND DEVICE FOR DETERMINING AN ESTIMATED TIME BEFORE A TECHNICAL INCIDENT IN A COMPUTING INFRASTRUCTURE FROM VALUES OF PERFORMANCE INDICATORS

    公开(公告)号:US20210026725A1

    公开(公告)日:2021-01-28

    申请号:US16927162

    申请日:2020-07-13

    申请人: BULL SAS

    IPC分类号: G06F11/07

    摘要: The invention relates to a method and a device for determining an estimated duration before a technical incident, said method comprising: a step (120) of receiving performance indicator values, a step (140) of identifying anomalous performance indicators, a step (150) of identifying first at-risk indicators, a step (160) of identifying other at-risk indicators, and a step (170) of determining an estimated duration before a technical incident comprising a calculation, from the anomalous indicators and at-risk indicators identified, of a shorter path leading to a risk of technical incident, and a calculation of an estimated duration before a technical incident, said estimated duration before a technical incident being calculated from the values of duration before becoming anomalous between correlated performance indicators for each of the performance indicators constituting the shortest path calculated.

    HEATSINK FOR MULTIPLE MEMORY MODULES
    52.
    发明申请

    公开(公告)号:US20200305311A1

    公开(公告)日:2020-09-24

    申请号:US16815365

    申请日:2020-03-11

    申请人: BULL SAS

    IPC分类号: H05K7/20 G06F1/20

    摘要: A heatsink for a plurality of memory modules that can be connected to an electronic board, each memory module including two heat exchange surfaces, includes at least one envelope including a top surface, at least two outer tabs, configured to be in thermal contact with at least one heat exchange surface of at least one memory module, at least one contact surface, in thermal contact with the fluid cooling system of said electronic board, a plurality of inner tabs, each inner tab being interposed between two memory modules in order to make thermal contact with at least one exchange surface of each of the two memory modules, the envelope is detachably placed against the two exchange surfaces of each memory module, the envelope is mechanically detachably fastened to the board.

    DISSIPATING INTERCONNECTION MODULE FOR M.2 FORM FACTOR EXPANSION CARD

    公开(公告)号:US20200301488A1

    公开(公告)日:2020-09-24

    申请号:US16822358

    申请日:2020-03-18

    申请人: BULL SAS

    发明人: Luc DALLASERRA

    IPC分类号: G06F1/20 G06F1/18

    摘要: A dissipating interconnection module for an M.2 form factor expansion card, includes a heat sink, which includes an enclosure including an upper wall for being in thermal contact with the first heat exchange surface of the expansion card and two tabs, each tab for being in thermal contact with the upper wall of the heat sink and for being in thermal contact with the fluid cooling system of the first electronic board, and the upper wall and the two tabs of the enclosure being arranged to form a space in which the expansion card can be received; a mechanical attachment system for removably mechanically attaching the expansion card to the heat sink; an interconnection electronic board including the second M.2 connector, a third electrical connector to be connected to a fourth electrical connector of the first electronic board.

    METHOD FOR ANALYZING A SIMULATION OF THE EXECUTION OF A QUANTUM CIRCUIT

    公开(公告)号:US20200249968A1

    公开(公告)日:2020-08-06

    申请号:US16723267

    申请日:2019-12-20

    申请人: BULL SAS

    IPC分类号: G06F9/455 G06N10/00

    摘要: A method for analyzing a simulation of the execution of a quantum circuit includes: a step of post-selecting one or more particular values of one or more qubits at one or more steps of the simulation; a step of setting filtration that sets the value of one or more quantum states of the quantum state vector(s) derived from the post-selection(s) of qubits; a step of analyzing the part of the simulation that corresponds to the post-selection(s) of qubits and to the quantum state vector(s) filtered.

    METHOD FOR THE IDENTIFICATION OF A CONNECTED OBJECT IN A NETWORK INFRASTRUCTURE

    公开(公告)号:US20200213934A1

    公开(公告)日:2020-07-02

    申请号:US16731222

    申请日:2019-12-31

    申请人: BULL SAS

    IPC分类号: H04W40/24 H04W8/00

    摘要: A method is proposed for the identification of a connected object in a network infrastructure which comprises at least two networks of connected objects interconnected by the intermediary of a data transport network. The method enables a connected object to search for and identify one or more other connected objects of the network infrastructure on the basis of specific search criteria. In particular, a connection gateway can, first, receive (201) and process (202) a request, which contains the search criteria, coming from a connected object and, secondly, transmit (203) to said connected object identification information for other connected objects that meet these criteria.

    Air-conditioning system of a building

    公开(公告)号:US10697654B2

    公开(公告)日:2020-06-30

    申请号:US15741446

    申请日:2016-07-04

    申请人: BULL SAS

    IPC分类号: F24F5/00

    摘要: An air-conditioning system of a building includes a water supply system; a control system for controlling the flow of water from the water supply system; a water distribution system for distributing water near an outer surface of the building, the flow rate of the water being controlled by the control system; a water droplet generation system configured to generate water droplets from the water coming from the water distribution system, the water droplet generation system for generating water droplets generating water droplets on at least one portion of the outer surface of the building.

    Method and device for dynamically managing the message retransmission delay on an interconnection network

    公开(公告)号:US10601722B2

    公开(公告)日:2020-03-24

    申请号:US16156287

    申请日:2018-10-10

    申请人: BULL SAS

    摘要: The disclosure relates to a network interface controller for dynamically managing a retransmission delay of a message to resend the message if the retransmission delay is exceeded. The controller includes a communication module to receive an instruction for transmitting a message, said instruction including characteristic data of the message; transmission buffer memory to store the characteristic data and to associate it with a retransmission delay; a slowdown defining calculator to define a value of the division factor from said characteristic data; a reference clock to generate a fixed frequency signal; a frequency divider to generate a reduced frequency signal from the value of the division factor and the fixed frequency signal; and a reduced frequency clock associated with the transmission buffer memory to allow the retransmission delay to be timed from the reduced frequency signal and to trigger a retransmission of the message if the retransmission delay is exceeded.

    System for locking a fitting base of a plug to a plug, associated fitting base and plug

    公开(公告)号:US10594083B2

    公开(公告)日:2020-03-17

    申请号:US15741455

    申请日:2016-06-23

    申请人: BULL SAS

    IPC分类号: H01R13/639

    摘要: A fitting base of a plug includes a supporting element including at least one opening suitable for receiving at least one connector of the plug, a first stationary portion projecting from the supporting element, a first movable portion secured to the first stationary portion, the movable portion having a shape and dimensions suitable for the insertion thereof into a first cavity in the plug when the at least one connector of the plug is fitted in the at least one opening in the supporting element.

    Method of obtaining information stored in processing module registers of a computer just after the occurrence of a fatal error

    公开(公告)号:US10467101B2

    公开(公告)日:2019-11-05

    申请号:US15312782

    申请日:2015-05-12

    申请人: BULL SAS

    摘要: A method of obtaining information stored in registers of at least one processing module of a computer, each processing module including a management controller to read the information stored in the associated registers, and a programmable logic circuit to trigger a requested reset following a fatal error, the method including in the event of reception of a reset request by a programmable logic circuit of a processing module, suspending by the programmable logic circuit the triggering of the reset and alerting the associated management controller of the occurrence of a fatal error, and, if the associated management controller is capable thereof, reading by the associated management controller the information stored in associated and chosen registers then storing by the associated management controller the read information in a file, and authorizing said associated programmable logic circuit to trigger said requested reset.

    Mechanism for analyzing correlation during performance degradation of an application chain

    公开(公告)号:US10447565B2

    公开(公告)日:2019-10-15

    申请号:US15338536

    申请日:2016-10-31

    申请人: BULL SAS

    IPC分类号: H04L12/26 G06F11/07 G06F11/34

    摘要: The present invention relates to a device comprising at least one computer machine and a software for executing a correlation analysis mechanism during performance degradation of an application chain comprising a hardware and software arrangement for storing a measuring repository, said measuring repository comprising a hardware and software arrangement for measuring, by consumption probes, the level of use of each resource on the set of servers constituting the application chain during periods of performance degradation, then storage in a memory of these levels in the measuring repository, in association with the period, said device being characterized in that it further comprises an editing hardware and software arrangement of a configuration repository, a categorization module of the performance problems as a function of the measuring and configuration repositories.