公开(公告)号：US06560212B1

公开(公告)日：2003-05-06

申请号：US09270916

申请日：1999-03-16

Applicant: Mohit K. Prasad ,  Xiao-An Wang

Inventor： Mohit K. Prasad ,  Xiao-An Wang

IPC: H04B7216

CPC classification number: H04B1/70756 ,  H03K3/84 ,  H04J13/10

Abstract: An offset sequence generator generates an offset sequence from a reference sequence, the offset sequence being a cyclic-shifted version of the reference sequence. The reference sequence is a deBruijn sequence formed from a pseudo-noise (PN) sequence augmented with an insert-bit, the insert-bit being inserted at a rollover state of the PN sequence. The offset generator includes a decision circuit that selects values of either the reference sequence or a delayed reference sequence as an input to a mask circuit. The mask circuit applies masks so as to generate the PN sequence of the offset sequence. The decision circuit also detects the rollover state of the PN sequence of the offset sequence, and inserts the insert-bit so as to provide the offset sequence.

Abstract translation: 偏移序列生成器从参考序列生成偏移序列，偏移序列是参考序列的循环移位版本。 参考序列是由扩展有插入位的伪噪声（PN）序列形成的deBruijn序列，插入位以PN序列的翻转状态插入。 偏移发生器包括选择参考序列或延迟参考序列的值作为掩码电路的输入的判定电路。 掩模电路应用掩模以产生偏移序列的PN序列。 判定电路还检测偏移序列的PN序列的翻转状态，并插入插入位以提供偏移序列。

公开(公告)号：US06411976B1

公开(公告)日：2002-06-25

申请号：US09131929

申请日：1998-08-10

Applicant: Richard Adam Cesari ,  Xiao-An Wang

Inventor： Richard Adam Cesari ,  Xiao-An Wang

IPC: G06F1710

CPC classification number: H03H17/0286 ,  H03H17/0227

Abstract: An N-stage finite impulse response (FIR) filter embodying the invention includes a first filter section whose filter coefficients are made either 1 or zero (rather than 1 and −1) in order to produce a first output (i.e., C1) and a second filter section for producing a second output (i.e., C2), which when combined (added to or subtracted from) with the first output produces an output function (i.e., Cn) which is equal to that produced by an N-stage FIR filter implementing filter coefficients having a value of either 1 or −1. In a preferred embodiment, the first filter section computes the function C1 = ∑ k = 0 N - 1 ⁢ y ⁡ ( n - k ) · x ⁡ ( k ) + 1 2 ; and the second filter section computes the function C2 = ∑ k = 0 N - 1 ⁢ y ⁡ ( n - k ) . The functions C1 and C2 may be combined to produce an output function equal to 2[C1−(½)C2] or 2C1−C2.

Abstract translation: 实施本发明的N阶有限脉冲响应（FIR）滤波器包括第一滤波器部分，其滤波器系数为1或0（而不是1和-1），以便产生第一输出（即，C1）和 第二滤波器部分，用于产生第二输出（即C2），当与第一输出组合（相加或相减时）产生等于由N级FIR滤波器产生的输出函数（即，Cn） 实现值为1或-1的滤波器系数。 在优选实施例中，第一滤波器部分计算功能，第二滤波器部分计算功能。功能C1和C2可以被组合以产生等于2 [C1（1/2）C2]或2C1-C2的输出功能。

公开(公告)号：US6127860A

公开(公告)日：2000-10-03

申请号：US971430

申请日：1997-11-17

Applicant: David G. Martin ,  Xiao-an Wang

Inventor： David G. Martin ,  Xiao-an Wang

IPC: G06F1/035 ,  H03B21/00

CPC classification number: G06F1/0356 ,  G06F2101/04

Abstract: An apparatus and method for generating a sine wave signal for a desired phase input. The sine wave signal is generated by implementing a linear expansion of the sine function. An incoming phase value is divided into a base phase value and an incremental phase value. The sine value for each base phase value is stored in a look-up table. The sine values for phase values falling between base phase values are generated using a linear expansion of the sine function.

Abstract translation: 一种用于产生所需相位输入的正弦波信号的装置和方法。 通过实现正弦函数的线性扩展来产生正弦波信号。 输入相位值被分为基相位值和增量相位值。 每个基相位值的正弦值存储在查找表中。 使用正弦函数的线性扩展产生落在基相位值之间的相位值的正弦值。

公开(公告)号：US5954836A

公开(公告)日：1999-09-21

申请号：US7720

申请日：1998-01-15

Applicant: Xiao-an Wang

Inventor： Xiao-an Wang

IPC: H03M13/23 ,  G06F11/10 ,  H03M13/12

CPC classification number: H03M13/23

Abstract: A convolutional encoding apparatus and method for encoding input data with bits stored in a shift register. A predetermined set of coefficient values is provided to define a coefficient mask value. It is then determined whether the bit of the input data is one of a logical zero and a logical one. Only if the bit of the input data is a logical one, the coefficient mask value and the shift register value are combined to produce a next shift register value. Predetermined ones of the bits of the next shift register value are then selected as coded output data.

Abstract translation: 一种用于对存储在移位寄存器中的位对输入数据进行编码的卷积编码装置和方法。 提供预定的系数值集合来定义系数掩模值。 然后确定输入数据的位是否为逻辑0和逻辑1之一。 仅当输入数据的位是逻辑位时，系数掩码值和移位寄存器值被组合才产生下一个移位寄存器值。 然后选择下一个移位寄存器值的预定位的编码输出数据。