公开(公告)号：US08649810B2

公开(公告)日：2014-02-11

申请号：US12446485

申请日：2009-04-21

申请人： Stanley Reinhold ,  Xiao-An Wang

发明人： Stanley Reinhold ,  Xiao-An Wang

IPC分类号： H04W4/00

CPC分类号： H04W68/00 ,  H04L51/24 ,  H04M1/72552 ,  H04W4/14 ,  H04W52/0229 ,  Y02D70/00

摘要： A wireless telecommunication device conducts base station pages at large intervals, such as 30 seconds, rather than the more conventional 0.5 to 4 seconds. The network processes calls placed to that telecommunication device in accordance with an SMS (Short Messaging Service) type protocol rather than a conventional voice call protocol. Particularly, the network sends an SMS to the telephone indicating that a third party is calling (hereinafter termed a “pre-call SMS”). The pre-call SMS indicates the telephone number of the third party. The user of the telephone may call the third party back. In accordance with this protocol, the need to page at very short intervals so as to permit a telephone call to be established in “real-time” is eliminated. Therefore, the paging interval can be increased substantially, thereby substantially prolonging battery charge lifetime of the telephone. In accordance with another aspect of the invention, when a cellular telephone sends a pre-call SMS, it temporarily decreases its paging interval to a more conventional interval such as 0.5 seconds for a predetermined period of time (e.g., 1-5 minutes) after placing a call so that, if the called party returns the call, the calling party will receive the return call in real-time and be able to answer the incoming call and establish a voice call.

摘要翻译： 无线电信设备以大的时间间隔进行基站页面，例如30秒，而不是更常规的0.5至4秒。 网络根据SMS（短消息服务）类型协议而不是传统语音呼叫协议来处理对该电信设备的呼叫。 特别地，网络向电话发送指示第三方正在呼叫的SMS（以下称为“预呼叫SMS”）。 预通话短信表示第三方的电话号码。 电话的用户可以将第三方呼叫回来。 根据该协议，消除了以非常短的间隔寻呼以便允许以“实时”建立电话呼叫的需要。 因此，可以大幅度地提高寻呼间隔，从而大大延长电话的电池充电寿命。 根据本发明的另一方面，当蜂窝电话发送预呼叫SMS时，它将其寻呼间隔临时减小到更常规的时间间隔，例如0.5秒，预定时间段（例如，1-5分钟）之后 拨打电话，如果被叫方返回呼叫，主叫方将实时接收返回呼叫，并能够接听来电并建立语音电话。

公开(公告)号：US20120263222A1

公开(公告)日：2012-10-18

申请号：US13087943

申请日：2011-04-15

申请人： Xiao-an Wang

发明人： Xiao-an Wang

IPC分类号： H04L27/06 ,  H04B1/10 ,  H04L27/01

CPC分类号： H04L25/0328 ,  H04L25/03292 ,  H04L25/03331 ,  H04L25/03891

摘要： A method is described that enables maximum-likelihood (ML) demodulation for MIMO communications over frequency-selective channels. An equalizer is typically employed to suppress inter-symbol interference (ISI) due to frequency-selectiveness of the channel, but the noise of the equalizer output can be highly correlated such that standard ML-MIMO demodulations cannot directly apply. The method comprises first constructing equivalent post-equalization MIMO channel and noise covariance matrix, and then de-correlating the equalizer output so that ML or near-ML MIMO demodulations can be applied to improve the performance. Additionally, successive ISI cancellation (SIC) is described for further performance improvement.

摘要翻译： 描述了一种能够通过频率选择信道进行MIMO通信的最大似然（ML）解调的方法。 通常采用均衡器来抑制由于信道的频率选择性引起的符号间干扰（ISI），但是均衡器输出的噪声可以高度相关，使得标准ML-MIMO解调不能直接应用。 该方法包括首先构建等效的后均衡MIMO信道和噪声协方差矩阵，然后将均衡器输出去相关，使ML或近ML MIMO解调可以应用于提高性能。 另外，为了进一步提高性能，描述了连续的ISI取消（SIC）。

公开(公告)号：US20120243424A1

公开(公告)日：2012-09-27

申请号：US13052691

申请日：2011-03-21

申请人： Xiao-an Wang

发明人： Xiao-an Wang

IPC分类号： H04L12/26

CPC分类号： H04L25/03955 ,  H04B7/024 ,  H04B7/0626 ,  H04L5/0023 ,  H04L5/0035 ,  H04L5/0048 ,  H04L5/14 ,  H04L25/0204 ,  H04L25/0228 ,  H04L25/03904 ,  H04L27/2646 ,  H04L27/2657 ,  H04L27/2675 ,  H04L27/2695 ,  H04W24/00 ,  H04W48/08

摘要： Methods and apparatus are described that provide carrier-phase difference (CPD) acquisition via signaling protocols between communicating devices. The random CPD between two disjoint devices can be measured by the signaling protocols described herein. With the availability of the CPD, a device is also able to acquire its outgoing channel (transmit channel) information, thus avoiding the channel information feedback that is being considered and/or practiced in some wireless communications systems. Also described are methods and apparatus that use the CPD to synchronize the clocks of two or more devices and that track the time-variations of the CPD for reliable CPD measurement and tracking loop operations. Applications of the described methods and apparatus include wireless multipoint broadcast systems, also known as coordinated multipoint transmission, or CoMP, in LTE (long-term evolution)-advanced systems, point-to-point wireless MIMO systems, and general wireless device networks.

摘要翻译： 描述了通过通信设备之间的信令协议来提供载波相位差（CPD）采集的方法和装置。 可以通过本文描述的信令协议来测量两个不相交设备之间的随机CPD。 随着CPD的可用性，设备还能够获取其输出信道（发送信道）信息，从而避免在某些无线通信系统中正在考虑和/或实践的信道信息反馈。 还描述了使用CPD来同步两个或更多个设备的时钟并跟踪CPD的时间变化以用于可靠的CPD测量和跟踪循环操作的方法和装置。 所描述的方法和装置的应用包括LTE（长期演进） - 高级系统，点对点无线MIMO系统和一般无线设备网络中的无线多点广播系统，也称为协调多点传输，或CoMP。

公开(公告)号：US07974997B2

公开(公告)日：2011-07-05

申请号：US11731174

申请日：2007-03-30

申请人： Eliahou Arviv ,  Robert L. Lang ,  Yi-Chen Li ,  Oliver Ridler ,  Xiao-an Wang

发明人： Eliahou Arviv ,  Robert L. Lang ,  Yi-Chen Li ,  Oliver Ridler ,  Xiao-an Wang

IPC分类号： G06F17/16

CPC分类号： G06F17/16 ,  H04B1/707 ,  H04B2201/70707 ,  H04B2201/709727

摘要： In one embodiment, a receiver including one or more signal-processing blocks and a hardware-based matrix co-processor. The one or more signal-processing blocks are adapted to generate a processed signal from a received signal. The hardware-based matrix co-processor includes two or more different matrix-computation engines, each adapted to perform a different matrix computation, and one or more shared hardware-computation units, each adapted to perform a mathematical operation. At least one signal-processing block is adapted to offload matrix-based signal processing to the hardware-based matrix co-processor. Each of the two or more different matrix-computation engines is adapted to offload the same type of mathematical processing to at least one of the one or more shared hardware-computation units.

摘要翻译： 在一个实施例中，接收机包括一个或多个信号处理块和基于硬件的矩阵协处理器。 所述一个或多个信号处理块适于从接收到的信号产生经处理的信号。 基于硬件的矩阵协处理器包括两个或更多个不同的矩阵计算引擎，每个矩阵计算引擎适于执行不同的矩阵计算，以及一个或多个共享硬件计算单元，每个共享硬件计算单元适于执行数学运算。 至少一个信号处理块适于将基于矩阵的信号处理卸载到基于硬件的矩阵协处理器。 两个或更多个不同的矩阵计算引擎中的每一个适于将相同类型的数学处理卸载到一个或多个共享硬件计算单元中的至少一个。

公开(公告)号：US20080243982A1

公开(公告)日：2008-10-02

申请号：US11731174

申请日：2007-03-30

申请人： Eliahou Arviv ,  Robert L. Lang ,  Yi-Chen Li ,  Oliver Ridler ,  Xiao-an Wang

发明人： Eliahou Arviv ,  Robert L. Lang ,  Yi-Chen Li ,  Oliver Ridler ,  Xiao-an Wang

IPC分类号： G06F17/10 ,  G06F7/32

CPC分类号： G06F17/16 ,  H04B1/707 ,  H04B2201/70707 ,  H04B2201/709727

摘要： In one embodiment, a receiver including one or more signal-processing blocks and a hardware-based matrix co-processor. The one or more signal-processing blocks are adapted to generate a processed signal from a received signal. The hardware-based matrix co-processor includes two or more different matrix-computation engines, each adapted to perform a different matrix computation, and one or more shared hardware-computation units, each adapted to perform a mathematical operation. At least one signal-processing block is adapted to offload matrix-based signal processing to the hardware-based matrix co-processor. Each of the two or more different matrix-computation engines is adapted to offload the same type of mathematical processing to at least one of the one or more shared hardware-computation units.

摘要翻译： 在一个实施例中，接收机包括一个或多个信号处理块和基于硬件的矩阵协处理器。 所述一个或多个信号处理块适于从接收到的信号产生经处理的信号。 基于硬件的矩阵协处理器包括两个或更多个不同的矩阵计算引擎，每个矩阵计算引擎适于执行不同的矩阵计算，以及一个或多个共享硬件计算单元，每个共享硬件计算单元适于执行数学运算。 至少一个信号处理块适于将基于矩阵的信号处理卸载到基于硬件的矩阵协处理器。 两个或更多个不同的矩阵计算引擎中的每一个适于将相同类型的数学处理卸载到一个或多个共享硬件计算单元中的至少一个。

公开(公告)号：US20050152486A1

公开(公告)日：2005-07-14

申请号：US10754340

申请日：2004-01-09

申请人： Xiao-an Wang

发明人： Xiao-an Wang

IPC分类号： H03H7/30 ,  H03K5/159 ,  H04B1/10 ,  H04L1/06 ,  H04L1/20 ,  H04L25/03

CPC分类号： H04B1/712 ,  H04B2201/709727 ,  H04L1/20 ,  H04L25/03038 ,  H04L2025/03375 ,  H04L2025/03605 ,  H04L2025/03643

摘要： Methods of recovering data in a received signal sent in a communications media are disclosed. Composite channel impulse responses are first estimated. Channel-tap locations are then assigned to suppress the interference noises by sequential search schemes or heuristic search schemes based on estimated composite channel impulse responses. A sequential search scheme optimizes a predetermined design criterion in a sequential manner. Also described are recursive evaluations of the design criterion and the inverses of the noise covariance matrices based on the composite channel impulse response during a sequential search. A heuristic search scheme selects channel-tap locations based on a set of pre-selected channel-tap locations. The set of pre-selected channel-tap locations is determined according to the estimated composite channel impulse response. A method of estimating energy levels of known interference sources is also described.

摘要翻译： 公开了在通信介质中发送的接收信号中恢复数据的方法。 首先估计复合信道脉冲响应。 然后分配频道抽头位置以通过基于估计的复合信道脉冲响应的顺序搜索方案或启发式搜索方案来抑制干扰噪声。 顺序搜索方案以顺序方式优化预定的设计标准。 还描述了基于在顺序搜索期间的复合信道脉冲响应的设计标准和噪声协方差矩阵的反演的递归评估。 启发式搜索方案基于一组预先选择的频道抽头位置来选择频道抽头位置。 根据估计的复合信道脉冲响应来确定预先选择的信道抽头位置集合。 还描述了估计已知干扰源的能量水平的方法。

公开(公告)号：US06614858B1

公开(公告)日：2003-09-02

申请号：US09506019

申请日：2000-02-17

申请人： Steven P. Pekarich ,  Xiao-An Wang

发明人： Steven P. Pekarich ,  Xiao-An Wang

IPC分类号： H03D100

CPC分类号： H04L1/005 ,  H03M13/2957 ,  H03M13/6591 ,  H04L1/006

摘要： An iterative decoder limits the range of extrinsic information used for iterative decoding of an encoded frame of data. The iterative decoder includes two or more separate decoders for decoding a received encoded frame of data. Each decoder employs extrinsic information generated from the soft data generated by another decoder decoding the encoded frame of data. The extrinsic information includes an approximate measure of the probability that a particular transmitted bit received by the iterative decoder is a logic 0 or logic 1. The extrinsic information for the bit originates with one decoder and is used by another decoder as external information about that bit. Implementations of the iterative decoder use saturation values to define the boundaries of the range. The saturation values are selected such that either no or relatively small degradation in BER occurs, and the saturation values also define the width of the binary representation of the extrinsic information.

摘要翻译： 迭代解码器限制用于编码数据帧的迭代解码的外在信息的范围。 迭代解码器包括用于对接收到的编码数据帧进行解码的两个或多个单独的解码器。 每个解码器使用由另一解码器产生的软数据产生的外部信息，对编码的数据帧进行解码。 外在信息包括由迭代解码器接收到的特定发送位为逻辑0或逻辑1的概率的近似度量。位的外部信息源于一个解码器，并由另一个解码器用作关于该位的外部信息 。 迭代解码器的实现使用饱和值来定义范围的边界。 饱和度值被选择为使得BER中没有或相对较小的劣化发生，并且饱和度值也定义了外在信息的二进制表示的宽度。

公开(公告)号：US06611494B1

公开(公告)日：2003-08-26

申请号：US09314834

申请日：1999-05-19

申请人： Sameer V. Ovalekar ,  Xiao-An Wang

发明人： Sameer V. Ovalekar ,  Xiao-An Wang

IPC分类号： H04J1100

CPC分类号： H04J13/004 ,  H04J13/12

摘要： A set of orthogonal sequences (e.g., Hadamard sequences) is decomposed into a set of basis vectors and sets of coefficients, where each set of coefficients represents a particular “vector combination” of the basis vectors that forms one of the orthogonal sequences. Such decomposition of orthogonal sequences into basis vectors and sets of coefficients may allow for a reduction in memory space and/or processing required to generate one or more of the orthogonal sequences during real-time operations of a communications system, such as an IS-95 CDMA system, that employs the orthogonal sequences. In one embodiment, a Hadamard sequence generator includes a controller, a memory, and a combiner. The set of basis vectors are stored in the memory, and each of the Hadamard sequences has a corresponding set of coefficients from which the Hadamard sequence can be derived as a vector combination of the basis vectors. These coefficients are either also stored in memory, or known to the controller based on a relationship between the coefficients and the row number of the Hadamard sequence in a corresponding Walsh-Hadamard matrix. To generate a particular sequence, the controller determines the corresponding set of coefficients and causes the basis vectors to be provided to the combiner. Based on the set of coefficients, the combiner combines the elements of specific basis vectors using modulo-2 addition to generate the desired Hadamard sequence.

摘要翻译： 一组正交序列（例如，Hadamard序列）被分解成一组基本向量和系数集合，其中每组系数表示形成正交序列之一的基本向量的特定“向量组合”。 将正交序列分解为基本向量和系数集合可以允许在通信系统（例如IS-95）的实时操作期间减少在生成一个或多个正交序列所需的存储器空间和/或处理 CDMA系统，采用正交序列。 在一个实施例中，哈达玛序列发生器包括控制器，存储器和组合器。 基矢量的集合被存储在存储器中，并且每个Hadamard序列具有相应的系数集合，可以从其中导出Hadamard序列作为基本向量的向量组合。 这些系数也存储在存储器中，或者基于对应的沃尔什 - 哈达玛矩阵中的系数与Hadamard序列的行号之间的关系而被控制器所知。 为了产生特定的序列，控制器确定相应的系数集合，并且使得向组合器提供基本向量。 基于该组系数，组合器使用模2加法组合特定基向量的元素以产生期望的Hadamard序列。

公开(公告)号：US06396411B1

公开(公告)日：2002-05-28

申请号：US09244995

申请日：1999-02-04

申请人： Dwane A. Bell ,  Xiao-an Wang

发明人： Dwane A. Bell ,  Xiao-an Wang

IPC分类号： H04L700

CPC分类号： H04J3/0608 ,  H04W56/0085 ,  H04W68/00 ,  H04W88/02

摘要： A method and apparatus that utilizes soft outputs from a paging device demodulator to perform frame synchronization is provided. The soft outputs are summed after being correlated to a first pattern associated with a paging protocol. The summation is then compared to a frame synchronization threshold. Frame synchronization occurs when the summation reaches the threshold. Using soft outputs, and a summation of the outputs based on a correlation with the first pattern, the method and apparatus require less processing, are more efficient and are more reliable than conventional synchronization schemes.

摘要翻译： 提供了利用来自寻呼装置解调器的软输出执行帧同步的方法和装置。 软输出在与寻呼协议相关联的第一模式相关之后相加。 然后将求和与帧同步阈值进行比较。 当总和达到阈值时，发生帧同步。 使用软输出和基于与第一模式的相关性的输出的总和，所述方法和装置需要较少的处理，比常规同步方案更有效并且更可靠。

公开(公告)号：US5548684A

公开(公告)日：1996-08-20

申请号：US232812

申请日：1994-04-22

申请人： Xiao-an Wang ,  Stephen B. Wicker

发明人： Xiao-an Wang ,  Stephen B. Wicker

IPC分类号： H03M13/41 ,  G06E1/00

CPC分类号： H03M13/6502 ,  H03M13/41 ,  H03M13/4184

摘要： An artificial neural network (ANN) decoding system decodes a convolutionally-encoded data stream at high speed and with high efficiency. The ANN decoding system implements the Viterbi algorithm and is significantly faster than comparable digital-only designs due to its fully parallel architecture. Several modifications to the fully analog system are described, including an analog/digital hybrid design that results in an extremely fast and efficient Viterbi decoding system. A complexity and analysis shows that the modified ANN decoding system is much simpler and easier to implement than its fully digital counterpart. The structure of the ANN decoding system of the invention provides a natural fit for VLSI implementation. Simulation results show that the performance of the ANN decoding system exactly matches that of an ideal Viterbi decoding system.

摘要翻译： 人造神经网络（ANN）解码系统以高速和高效率解码卷积编码的数据流。 ANN解码系统实现了维特比（Viterbi）算法，由于其完全并行架构，因此可比数字专用设计快得多。 描述了对完全模拟系统的若干修改，包括模拟/数字混合设计，其导致极快速和有效的维特比解码系统。 复杂性和分析表明，修改后的ANN解码系统比其全数字对应系统要简单得多，易于实现。 本发明的ANN解码系统的结构为VLSI实现提供了一种自然的契合。 模拟结果表明，ANN解码系统的性能与理想维特比解码系统的性能完全一致。